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From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
	Jordan Crouse <jcrouse@codeaurora.org>,
	Rob Clark <robdclark@chromium.org>
Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org,
	Sibi Sankar <sibis@codeaurora.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v3 4/8] iommu/arm-smmu-qcom: Emulate bypass by using context banks
Date: Fri,  4 Sep 2020 15:55:09 +0000	[thread overview]
Message-ID: <20200904155513.282067-5-bjorn.andersson@linaro.org> (raw)
In-Reply-To: <20200904155513.282067-1-bjorn.andersson@linaro.org>

Some firmware found on various Qualcomm platforms traps writes to S2CR
of type BYPASS and writes FAULT into the register. In particular, this
prevents us from marking the streams for the display controller as
BYPASS to allow continued scanout of the screen through the
initialization of the ARM SMMU.

This adds a Qualcomm specific cfg_probe function, which probes for the
broken behavior of the S2CR registers and implements a custom
alloc_context_bank() that when necessary allocates a context bank
(without translation) for these domains as well.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---

Changes since v2:
- Move quirk from arm_smmudevice to qcom_smmu, as we localize the quirk
  handling to the Qualcomm specific implemntation.

 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 52 ++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 229fc8ff8cea..284761a1cd8e 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -11,8 +11,14 @@
 
 struct qcom_smmu {
 	struct arm_smmu_device smmu;
+	bool bypass_broken;
 };
 
+static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu)
+{
+	return container_of(smmu, struct qcom_smmu, smmu);
+}
+
 #define QCOM_ADRENO_SMMU_GPU_SID 0
 
 static bool qcom_adreno_smmu_is_gpu_device(struct device *dev)
@@ -162,6 +168,50 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = {
 	{ }
 };
 
+static int qcom_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain,
+					struct arm_smmu_device *smmu,
+					struct device *dev, int start)
+{
+	struct iommu_domain *domain = &smmu_domain->domain;
+	struct qcom_smmu *qsmmu = to_qcom_smmu(smmu);
+
+	/* Keep identity domains as bypass, unless bypass is broken */
+	if (domain->type == IOMMU_DOMAIN_IDENTITY && !qsmmu->bypass_broken)
+		return ARM_SMMU_CBNDX_BYPASS;
+
+	/*
+	 * The identity domain to emulate bypass is the only domain without a
+	 * dev, use the last context bank for this to avoid collisions with
+	 * active contexts during initialization.
+	 */
+	if (!dev)
+		start = smmu->num_context_banks - 1;
+
+	return __arm_smmu_alloc_bitmap(smmu->context_map, start, smmu->num_context_banks);
+}
+
+static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu)
+{
+	unsigned int last_s2cr = ARM_SMMU_GR0_S2CR(smmu->num_mapping_groups - 1);
+	struct qcom_smmu *qsmmu = to_qcom_smmu(smmu);
+	u32 reg;
+
+	/*
+	 * With some firmware writes to S2CR of type FAULT are ignored, and
+	 * writing BYPASS will end up as FAULT in the register. Perform a write
+	 * to S2CR to detect if this is the case with the current firmware.
+	 */
+	reg = FIELD_PREP(ARM_SMMU_S2CR_TYPE, S2CR_TYPE_BYPASS) |
+	      FIELD_PREP(ARM_SMMU_S2CR_CBNDX, 0xff) |
+	      FIELD_PREP(ARM_SMMU_S2CR_PRIVCFG, S2CR_PRIVCFG_DEFAULT);
+	arm_smmu_gr0_write(smmu, last_s2cr, reg);
+	reg = arm_smmu_gr0_read(smmu, last_s2cr);
+	if (FIELD_GET(ARM_SMMU_S2CR_TYPE, reg) != S2CR_TYPE_BYPASS)
+		qsmmu->bypass_broken = true;
+
+	return 0;
+}
+
 static int qcom_smmu_def_domain_type(struct device *dev)
 {
 	const struct of_device_id *match =
@@ -200,6 +250,8 @@ static int qcom_smmu500_reset(struct arm_smmu_device *smmu)
 }
 
 static const struct arm_smmu_impl qcom_smmu_impl = {
+	.alloc_context_bank = qcom_smmu_alloc_context_bank,
+	.cfg_probe = qcom_smmu_cfg_probe,
 	.def_domain_type = qcom_smmu_def_domain_type,
 	.reset = qcom_smmu500_reset,
 };
-- 
2.28.0

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  parent reply	other threads:[~2020-09-04 16:02 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-04 15:55 [PATCH v3 0/8] iommu/arm-smmu: Support maintaining bootloader mappings Bjorn Andersson
2020-09-04 15:55 ` [PATCH v3 1/8] iommu/arm-smmu: Refactor context bank allocation Bjorn Andersson
2020-09-08 18:42   ` Jordan Crouse
2020-09-08 18:46     ` Jordan Crouse
2020-09-11  8:18   ` Sai Prakash Ranjan
2020-09-04 15:55 ` [PATCH v3 2/8] iommu/arm-smmu: Delay modifying domain during init Bjorn Andersson
2020-09-11  8:20   ` Sai Prakash Ranjan
2020-09-04 15:55 ` [PATCH v3 3/8] iommu/arm-smmu: Consult context bank allocator for identify domains Bjorn Andersson
2020-09-11  8:21   ` Sai Prakash Ranjan
2020-09-11  8:24   ` Sai Prakash Ranjan
2020-09-04 15:55 ` Bjorn Andersson [this message]
2020-09-11  8:25   ` [PATCH v3 4/8] iommu/arm-smmu-qcom: Emulate bypass by using context banks Sai Prakash Ranjan
2020-09-04 15:55 ` [PATCH v3 5/8] iommu/arm-smmu-qcom: Consistently initialize stream mappings Bjorn Andersson
2020-09-11  8:26   ` Sai Prakash Ranjan
2020-09-04 15:55 ` [PATCH v3 6/8] iommu/arm-smmu: Add impl hook for inherit boot mappings Bjorn Andersson
2020-09-11  8:27   ` Sai Prakash Ranjan
2020-09-11 17:13   ` Robin Murphy
2020-09-13  3:25     ` Bjorn Andersson
2020-09-21 21:08       ` Will Deacon
2020-09-24 15:55         ` Bjorn Andersson
2020-10-12  7:31         ` Bjorn Andersson
2020-10-13 16:47           ` Robin Murphy
2020-09-04 15:55 ` [PATCH v3 7/8] iommu/arm-smmu: Provide helper for allocating identity domain Bjorn Andersson
2020-09-11  8:28   ` Sai Prakash Ranjan
2020-09-04 15:55 ` [PATCH v3 8/8] iommu/arm-smmu-qcom: Setup identity domain for boot mappings Bjorn Andersson
2020-09-11  8:29   ` Sai Prakash Ranjan
2020-09-11 17:29   ` Robin Murphy
2020-09-05 22:27 ` [PATCH v3 0/8] iommu/arm-smmu: Support maintaining bootloader mappings Rob Clark
2020-09-09 14:46 ` Laurentiu Tudor
2020-09-10 22:56 ` John Stultz
2020-09-11  8:16 ` Sai Prakash Ranjan
2020-09-11 16:10 ` Amit Pundir
2020-09-16 10:09 ` Laurentiu Tudor

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