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[73.25.156.94]) by smtp.gmail.com with ESMTPSA id j20sm10591603pfi.122.2020.09.05.13.05.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Sep 2020 13:05:11 -0700 (PDT) From: Rob Clark To: iommu@lists.linux-foundation.org, dri-devel@lists.freedesktop.org, Will Deacon , Robin Murphy , Joerg Roedel Subject: [PATCH v17 19/20] arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU Date: Sat, 5 Sep 2020 13:04:25 -0700 Message-Id: <20200905200454.240929-20-robdclark@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200905200454.240929-1-robdclark@gmail.com> References: <20200905200454.240929-1-robdclark@gmail.com> MIME-Version: 1.0 Cc: Rob Clark , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-msm@vger.kernel.org, Akhil P Oommen , Rob Herring , Stephen Boyd , Andy Gross , Sibi Sankar , Vivek Gautam , freedreno@lists.freedesktop.org, open list X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" From: Jordan Crouse Set the qcom,adreno-smmu compatible string for the GPU SMMU to enable split pagetables and per-instance pagetables for drm/msm. Signed-off-by: Jordan Crouse Signed-off-by: Rob Clark Reviewed-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 9 +++++++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi index 64fc1bfd66fa..39f23cdcbd02 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi @@ -633,6 +633,15 @@ &mdss_mdp { status = "okay"; }; +/* + * Cheza fw does not properly program the GPU aperture to allow the + * GPU to update the SMMU pagetables for context switches. Work + * around this by dropping the "qcom,adreno-smmu" compat string. + */ +&adreno_smmu { + compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2"; +}; + &mss_pil { iommus = <&apps_smmu 0x781 0x0>, <&apps_smmu 0x724 0x3>; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 2884577dcb77..76a8a34640ae 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -4058,7 +4058,7 @@ opp-257000000 { }; adreno_smmu: iommu@5040000 { - compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2"; + compatible = "qcom,sdm845-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2"; reg = <0 0x5040000 0 0x10000>; #iommu-cells = <1>; #global-interrupts = <2>; -- 2.26.2 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu