* [PATCH v4 1/3] dt-bindings: iommu: Add binding for MediaTek MT8167 IOMMU
@ 2020-09-07 10:16 Fabien Parent
2020-09-07 10:16 ` [PATCH v4 2/3] iommu/mediatek: add flag for legacy ivrp paddr Fabien Parent
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Fabien Parent @ 2020-09-07 10:16 UTC (permalink / raw)
To: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Cc: Rob Herring, Fabien Parent, miles.chen, robh+dt, matthias.bgg
This commit adds IOMMU binding documentation and larb port definitions
for the MT8167 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
---
V4:
* Added path to mt8167 larb header file
* Added Honghui Zhang in copyright header
V3: Added mt8167-larb-port.h file for iommu port definitions
V2: no change
---
.../bindings/iommu/mediatek,iommu.txt | 2 +
include/dt-bindings/memory/mt8167-larb-port.h | 51 +++++++++++++++++++
2 files changed, 53 insertions(+)
create mode 100644 include/dt-bindings/memory/mt8167-larb-port.h
diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
index c1ccd8582eb2..ac949f7fe3d4 100644
--- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
+++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
@@ -61,6 +61,7 @@ Required properties:
"mediatek,mt6779-m4u" for mt6779 which uses generation two m4u HW.
"mediatek,mt7623-m4u", "mediatek,mt2701-m4u" for mt7623 which uses
generation one m4u HW.
+ "mediatek,mt8167-m4u" for mt8167 which uses generation two m4u HW.
"mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW.
"mediatek,mt8183-m4u" for mt8183 which uses generation two m4u HW.
- reg : m4u register base and size.
@@ -80,6 +81,7 @@ Required properties:
dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623
dt-binding/memory/mt2712-larb-port.h for mt2712,
dt-binding/memory/mt6779-larb-port.h for mt6779,
+ dt-binding/memory/mt8167-larb-port.h for mt8167,
dt-binding/memory/mt8173-larb-port.h for mt8173, and
dt-binding/memory/mt8183-larb-port.h for mt8183.
diff --git a/include/dt-bindings/memory/mt8167-larb-port.h b/include/dt-bindings/memory/mt8167-larb-port.h
new file mode 100644
index 000000000000..000fb299a408
--- /dev/null
+++ b/include/dt-bindings/memory/mt8167-larb-port.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ * Copyright (c) 2020 BayLibre, SAS
+ * Author: Honghui Zhang <honghui.zhang@mediatek.com>
+ * Author: Fabien Parent <fparent@baylibre.com>
+ */
+#ifndef __DTS_IOMMU_PORT_MT8167_H
+#define __DTS_IOMMU_PORT_MT8167_H
+
+#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
+
+#define M4U_LARB0_ID 0
+#define M4U_LARB1_ID 1
+#define M4U_LARB2_ID 2
+
+/* larb0 */
+#define M4U_PORT_DISP_OVL0 MTK_M4U_ID(M4U_LARB0_ID, 0)
+#define M4U_PORT_DISP_RDMA0 MTK_M4U_ID(M4U_LARB0_ID, 1)
+#define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 2)
+#define M4U_PORT_DISP_RDMA1 MTK_M4U_ID(M4U_LARB0_ID, 3)
+#define M4U_PORT_MDP_RDMA MTK_M4U_ID(M4U_LARB0_ID, 4)
+#define M4U_PORT_MDP_WDMA MTK_M4U_ID(M4U_LARB0_ID, 5)
+#define M4U_PORT_MDP_WROT MTK_M4U_ID(M4U_LARB0_ID, 6)
+#define M4U_PORT_DISP_FAKE MTK_M4U_ID(M4U_LARB0_ID, 7)
+
+/* larb1*/
+#define M4U_PORT_CAM_IMGO MTK_M4U_ID(M4U_LARB1_ID, 0)
+#define M4U_PORT_CAM_IMG2O MTK_M4U_ID(M4U_LARB1_ID, 1)
+#define M4U_PORT_CAM_LSCI MTK_M4U_ID(M4U_LARB1_ID, 2)
+#define M4U_PORT_CAM_ESFKO MTK_M4U_ID(M4U_LARB1_ID, 3)
+#define M4U_PORT_CAM_AAO MTK_M4U_ID(M4U_LARB1_ID, 4)
+#define M4U_PORT_VENC_REC MTK_M4U_ID(M4U_LARB1_ID, 5)
+#define M4U_PORT_VENC_BSDMA MTK_M4U_ID(M4U_LARB1_ID, 6)
+#define M4U_PORT_VENC_RD_COMV MTK_M4U_ID(M4U_LARB1_ID, 7)
+#define M4U_PORT_CAM_IMGI MTK_M4U_ID(M4U_LARB1_ID, 8)
+#define M4U_PORT_VENC_CUR_LUMA MTK_M4U_ID(M4U_LARB1_ID, 9)
+#define M4U_PORT_VENC_CUR_CHROMA MTK_M4U_ID(M4U_LARB1_ID, 10)
+#define M4U_PORT_VENC_REF_LUMA MTK_M4U_ID(M4U_LARB1_ID, 11)
+#define M4U_PORT_VENC_REF_CHROMA MTK_M4U_ID(M4U_LARB1_ID, 12)
+
+/* larb2*/
+#define M4U_PORT_HW_VDEC_MC_EXT MTK_M4U_ID(M4U_LARB2_ID, 0)
+#define M4U_PORT_HW_VDEC_PP_EXT MTK_M4U_ID(M4U_LARB2_ID, 1)
+#define M4U_PORT_HW_VDEC_VLD_EXT MTK_M4U_ID(M4U_LARB2_ID, 2)
+#define M4U_PORT_HW_VDEC_AVC_MV_EXT MTK_M4U_ID(M4U_LARB2_ID, 3)
+#define M4U_PORT_HW_VDEC_PRED_RD_EXT MTK_M4U_ID(M4U_LARB2_ID, 4)
+#define M4U_PORT_HW_VDEC_PRED_WR_EXT MTK_M4U_ID(M4U_LARB2_ID, 5)
+#define M4U_PORT_HW_VDEC_PPWRAP_EXT MTK_M4U_ID(M4U_LARB2_ID, 6)
+
+#endif
--
2.28.0
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v4 2/3] iommu/mediatek: add flag for legacy ivrp paddr
2020-09-07 10:16 [PATCH v4 1/3] dt-bindings: iommu: Add binding for MediaTek MT8167 IOMMU Fabien Parent
@ 2020-09-07 10:16 ` Fabien Parent
2020-09-14 9:19 ` Matthias Brugger
2020-09-07 10:16 ` [PATCH v4 3/3] iommu/mediatek: add support for MT8167 Fabien Parent
2020-09-18 8:29 ` [PATCH v4 1/3] dt-bindings: iommu: Add binding for MediaTek MT8167 IOMMU Joerg Roedel
2 siblings, 1 reply; 6+ messages in thread
From: Fabien Parent @ 2020-09-07 10:16 UTC (permalink / raw)
To: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Cc: Fabien Parent, miles.chen, robh+dt, matthias.bgg
Add a new flag in order to select which IVRP_PADDR format is used
by an SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Yong Wu <yong.wu@mediatek.com>
---
v4: no change
v3: set LEGACY_IVRP_PADDR as a flag instead of platform data
v2: new patch
---
drivers/iommu/mtk_iommu.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 785b228d39a6..b1f85a7e9346 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -116,6 +116,7 @@
#define OUT_ORDER_WR_EN BIT(4)
#define HAS_SUB_COMM BIT(5)
#define WR_THROT_EN BIT(6)
+#define HAS_LEGACY_IVRP_PADDR BIT(7)
#define MTK_IOMMU_HAS_FLAG(pdata, _x) \
((((pdata)->flags) & (_x)) == (_x))
@@ -582,7 +583,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
F_INT_PRETETCH_TRANSATION_FIFO_FAULT;
writel_relaxed(regval, data->base + REG_MMU_INT_MAIN_CONTROL);
- if (data->plat_data->m4u_plat == M4U_MT8173)
+ if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_LEGACY_IVRP_PADDR))
regval = (data->protect_base >> 1) | (data->enable_4GB << 31);
else
regval = lower_32_bits(data->protect_base) |
@@ -818,7 +819,8 @@ static const struct mtk_iommu_plat_data mt6779_data = {
static const struct mtk_iommu_plat_data mt8173_data = {
.m4u_plat = M4U_MT8173,
- .flags = HAS_4GB_MODE | HAS_BCLK | RESET_AXI,
+ .flags = HAS_4GB_MODE | HAS_BCLK | RESET_AXI |
+ HAS_LEGACY_IVRP_PADDR,
.inv_sel_reg = REG_MMU_INV_SEL_GEN1,
.larbid_remap = {{0}, {1}, {2}, {3}, {4}, {5}}, /* Linear mapping. */
};
--
2.28.0
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^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v4 2/3] iommu/mediatek: add flag for legacy ivrp paddr
2020-09-07 10:16 ` [PATCH v4 2/3] iommu/mediatek: add flag for legacy ivrp paddr Fabien Parent
@ 2020-09-14 9:19 ` Matthias Brugger
0 siblings, 0 replies; 6+ messages in thread
From: Matthias Brugger @ 2020-09-14 9:19 UTC (permalink / raw)
To: Fabien Parent, iommu, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
Cc: robh+dt, miles.chen
On 07/09/2020 12:16, Fabien Parent wrote:
> Add a new flag in order to select which IVRP_PADDR format is used
> by an SoC.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Reviewed-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
> ---
>
> v4: no change
> v3: set LEGACY_IVRP_PADDR as a flag instead of platform data
> v2: new patch
>
> ---
> drivers/iommu/mtk_iommu.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index 785b228d39a6..b1f85a7e9346 100644
> --- a/drivers/iommu/mtk_iommu.c
> +++ b/drivers/iommu/mtk_iommu.c
> @@ -116,6 +116,7 @@
> #define OUT_ORDER_WR_EN BIT(4)
> #define HAS_SUB_COMM BIT(5)
> #define WR_THROT_EN BIT(6)
> +#define HAS_LEGACY_IVRP_PADDR BIT(7)
>
> #define MTK_IOMMU_HAS_FLAG(pdata, _x) \
> ((((pdata)->flags) & (_x)) == (_x))
> @@ -582,7 +583,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
> F_INT_PRETETCH_TRANSATION_FIFO_FAULT;
> writel_relaxed(regval, data->base + REG_MMU_INT_MAIN_CONTROL);
>
> - if (data->plat_data->m4u_plat == M4U_MT8173)
> + if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_LEGACY_IVRP_PADDR))
> regval = (data->protect_base >> 1) | (data->enable_4GB << 31);
> else
> regval = lower_32_bits(data->protect_base) |
> @@ -818,7 +819,8 @@ static const struct mtk_iommu_plat_data mt6779_data = {
>
> static const struct mtk_iommu_plat_data mt8173_data = {
> .m4u_plat = M4U_MT8173,
> - .flags = HAS_4GB_MODE | HAS_BCLK | RESET_AXI,
> + .flags = HAS_4GB_MODE | HAS_BCLK | RESET_AXI |
> + HAS_LEGACY_IVRP_PADDR,
> .inv_sel_reg = REG_MMU_INV_SEL_GEN1,
> .larbid_remap = {{0}, {1}, {2}, {3}, {4}, {5}}, /* Linear mapping. */
> };
>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4 3/3] iommu/mediatek: add support for MT8167
2020-09-07 10:16 [PATCH v4 1/3] dt-bindings: iommu: Add binding for MediaTek MT8167 IOMMU Fabien Parent
2020-09-07 10:16 ` [PATCH v4 2/3] iommu/mediatek: add flag for legacy ivrp paddr Fabien Parent
@ 2020-09-07 10:16 ` Fabien Parent
2020-09-14 8:03 ` Yong Wu
2020-09-18 8:29 ` [PATCH v4 1/3] dt-bindings: iommu: Add binding for MediaTek MT8167 IOMMU Joerg Roedel
2 siblings, 1 reply; 6+ messages in thread
From: Fabien Parent @ 2020-09-07 10:16 UTC (permalink / raw)
To: iommu, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Cc: Fabien Parent, miles.chen, robh+dt, matthias.bgg
Add support for the IOMMU on MT8167
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
V4;
* Removed HAS_4GB_MODE flag since this SoC does not seem to support it
V3:
* use LEGACY_IVRP_PADDR flag instead of using a platform data member
V2:
* removed if based on m4u_plat, and using instead the new
has_legacy_ivrp_paddr member that was introduced in patch 2.
---
drivers/iommu/mtk_iommu.c | 8 ++++++++
drivers/iommu/mtk_iommu.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index b1f85a7e9346..4ff071eb5279 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -817,6 +817,13 @@ static const struct mtk_iommu_plat_data mt6779_data = {
.larbid_remap = {{0}, {1}, {2}, {3}, {5}, {7, 8}, {10}, {9}},
};
+static const struct mtk_iommu_plat_data mt8167_data = {
+ .m4u_plat = M4U_MT8167,
+ .flags = RESET_AXI | HAS_LEGACY_IVRP_PADDR,
+ .inv_sel_reg = REG_MMU_INV_SEL_GEN1,
+ .larbid_remap = {{0}, {1}, {2}}, /* Linear mapping. */
+};
+
static const struct mtk_iommu_plat_data mt8173_data = {
.m4u_plat = M4U_MT8173,
.flags = HAS_4GB_MODE | HAS_BCLK | RESET_AXI |
@@ -835,6 +842,7 @@ static const struct mtk_iommu_plat_data mt8183_data = {
static const struct of_device_id mtk_iommu_of_ids[] = {
{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
{ .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
+ { .compatible = "mediatek,mt8167-m4u", .data = &mt8167_data},
{ .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
{ .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
{}
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 122925dbe547..df32b3e3408b 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -39,6 +39,7 @@ enum mtk_iommu_plat {
M4U_MT2701,
M4U_MT2712,
M4U_MT6779,
+ M4U_MT8167,
M4U_MT8173,
M4U_MT8183,
};
--
2.28.0
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https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v4 3/3] iommu/mediatek: add support for MT8167
2020-09-07 10:16 ` [PATCH v4 3/3] iommu/mediatek: add support for MT8167 Fabien Parent
@ 2020-09-14 8:03 ` Yong Wu
0 siblings, 0 replies; 6+ messages in thread
From: Yong Wu @ 2020-09-14 8:03 UTC (permalink / raw)
To: Fabien Parent
Cc: devicetree, linux-kernel, iommu, robh+dt, linux-mediatek,
miles.chen, matthias.bgg, linux-arm-kernel
On Mon, 2020-09-07 at 12:16 +0200, Fabien Parent wrote:
> Add support for the IOMMU on MT8167
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Yong Wu <yong.wu@mediatek.com>
> ---
>
> V4;
> * Removed HAS_4GB_MODE flag since this SoC does not seem to support it
> V3:
> * use LEGACY_IVRP_PADDR flag instead of using a platform data member
> V2:
> * removed if based on m4u_plat, and using instead the new
> has_legacy_ivrp_paddr member that was introduced in patch 2.
>
> ---
> drivers/iommu/mtk_iommu.c | 8 ++++++++
> drivers/iommu/mtk_iommu.h | 1 +
> 2 files changed, 9 insertions(+)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index b1f85a7e9346..4ff071eb5279 100644
> --- a/drivers/iommu/mtk_iommu.c
> +++ b/drivers/iommu/mtk_iommu.c
> @@ -817,6 +817,13 @@ static const struct mtk_iommu_plat_data mt6779_data = {
> .larbid_remap = {{0}, {1}, {2}, {3}, {5}, {7, 8}, {10}, {9}},
> };
>
> +static const struct mtk_iommu_plat_data mt8167_data = {
> + .m4u_plat = M4U_MT8167,
> + .flags = RESET_AXI | HAS_LEGACY_IVRP_PADDR,
> + .inv_sel_reg = REG_MMU_INV_SEL_GEN1,
> + .larbid_remap = {{0}, {1}, {2}}, /* Linear mapping. */
> +};
> +
> static const struct mtk_iommu_plat_data mt8173_data = {
> .m4u_plat = M4U_MT8173,
> .flags = HAS_4GB_MODE | HAS_BCLK | RESET_AXI |
> @@ -835,6 +842,7 @@ static const struct mtk_iommu_plat_data mt8183_data = {
> static const struct of_device_id mtk_iommu_of_ids[] = {
> { .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
> { .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
> + { .compatible = "mediatek,mt8167-m4u", .data = &mt8167_data},
> { .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
> { .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
> {}
> diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
> index 122925dbe547..df32b3e3408b 100644
> --- a/drivers/iommu/mtk_iommu.h
> +++ b/drivers/iommu/mtk_iommu.h
> @@ -39,6 +39,7 @@ enum mtk_iommu_plat {
> M4U_MT2701,
> M4U_MT2712,
> M4U_MT6779,
> + M4U_MT8167,
> M4U_MT8173,
> M4U_MT8183,
> };
_______________________________________________
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 1/3] dt-bindings: iommu: Add binding for MediaTek MT8167 IOMMU
2020-09-07 10:16 [PATCH v4 1/3] dt-bindings: iommu: Add binding for MediaTek MT8167 IOMMU Fabien Parent
2020-09-07 10:16 ` [PATCH v4 2/3] iommu/mediatek: add flag for legacy ivrp paddr Fabien Parent
2020-09-07 10:16 ` [PATCH v4 3/3] iommu/mediatek: add support for MT8167 Fabien Parent
@ 2020-09-18 8:29 ` Joerg Roedel
2 siblings, 0 replies; 6+ messages in thread
From: Joerg Roedel @ 2020-09-18 8:29 UTC (permalink / raw)
To: Fabien Parent
Cc: devicetree, Rob Herring, linux-kernel, iommu, robh+dt,
linux-mediatek, miles.chen, matthias.bgg, linux-arm-kernel
On Mon, Sep 07, 2020 at 12:16:47PM +0200, Fabien Parent wrote:
> This commit adds IOMMU binding documentation and larb port definitions
> for the MT8167 SoC.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
>
> V4:
> * Added path to mt8167 larb header file
> * Added Honghui Zhang in copyright header
> V3: Added mt8167-larb-port.h file for iommu port definitions
> V2: no change
Applied all, thanks.
_______________________________________________
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-09-18 8:29 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2020-09-07 10:16 [PATCH v4 1/3] dt-bindings: iommu: Add binding for MediaTek MT8167 IOMMU Fabien Parent
2020-09-07 10:16 ` [PATCH v4 2/3] iommu/mediatek: add flag for legacy ivrp paddr Fabien Parent
2020-09-14 9:19 ` Matthias Brugger
2020-09-07 10:16 ` [PATCH v4 3/3] iommu/mediatek: add support for MT8167 Fabien Parent
2020-09-14 8:03 ` Yong Wu
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