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Fri, 11 Sep 2020 18:13:20 -0400 X-MC-Unique: LBfx2pWRPzGGg20n5LtlrQ-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 4BF1D1074640; Fri, 11 Sep 2020 22:13:18 +0000 (UTC) Received: from w520.home (ovpn-112-71.phx2.redhat.com [10.3.112.71]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9CD2F5C5AF; Fri, 11 Sep 2020 22:13:11 +0000 (UTC) Date: Fri, 11 Sep 2020 16:13:11 -0600 From: Alex Williamson To: Liu Yi L Subject: Re: [PATCH v7 13/16] vfio/pci: Expose PCIe PASID capability to guest Message-ID: <20200911161311.13999a57@w520.home> In-Reply-To: <1599734733-6431-14-git-send-email-yi.l.liu@intel.com> References: <1599734733-6431-1-git-send-email-yi.l.liu@intel.com> <1599734733-6431-14-git-send-email-yi.l.liu@intel.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Cc: jean-philippe@linaro.org, kevin.tian@intel.com, ashok.raj@intel.com, kvm@vger.kernel.org, jasowang@redhat.com, stefanha@gmail.com, iommu@lists.linux-foundation.org, yi.y.sun@intel.com, hao.wu@intel.com, jun.j.tian@intel.com X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Thu, 10 Sep 2020 03:45:30 -0700 Liu Yi L wrote: > This patch exposes PCIe PASID capability to guest for assigned devices. > Existing vfio_pci driver hides it from guest by setting the capability > length as 0 in pci_ext_cap_length[]. This exposes the PASID capability, but it's still read-only, so this largely just helps userspace know where to emulate the capability, right? Thanks, Alex > And this patch only exposes PASID capability for devices which has PCIe > PASID extended struture in its configuration space. VFs will not expose > the PASID capability as they do not implement the PASID extended structure > in their config space. It is a TODO in future. Related discussion can be > found in below link: > > https://lore.kernel.org/kvm/20200407095801.648b1371@w520.home/ > > Cc: Kevin Tian > CC: Jacob Pan > Cc: Alex Williamson > Cc: Eric Auger > Cc: Jean-Philippe Brucker > Cc: Joerg Roedel > Cc: Lu Baolu > Signed-off-by: Liu Yi L > Reviewed-by: Eric Auger > --- > v5 -> v6: > *) add review-by from Eric Auger. > > v1 -> v2: > *) added in v2, but it was sent in a separate patchseries before > --- > drivers/vfio/pci/vfio_pci_config.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/vfio/pci/vfio_pci_config.c b/drivers/vfio/pci/vfio_pci_config.c > index d98843f..07ff2e6 100644 > --- a/drivers/vfio/pci/vfio_pci_config.c > +++ b/drivers/vfio/pci/vfio_pci_config.c > @@ -95,7 +95,7 @@ static const u16 pci_ext_cap_length[PCI_EXT_CAP_ID_MAX + 1] = { > [PCI_EXT_CAP_ID_LTR] = PCI_EXT_CAP_LTR_SIZEOF, > [PCI_EXT_CAP_ID_SECPCI] = 0, /* not yet */ > [PCI_EXT_CAP_ID_PMUX] = 0, /* not yet */ > - [PCI_EXT_CAP_ID_PASID] = 0, /* not yet */ > + [PCI_EXT_CAP_ID_PASID] = PCI_EXT_CAP_PASID_SIZEOF, > }; > > /* _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu