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Thu, 17 Sep 2020 07:39:05 -0700 (PDT) Date: Thu, 17 Sep 2020 16:38:46 +0200 From: Jean-Philippe Brucker To: Auger Eric Subject: Re: [PATCH RESEND v9 09/13] iommu/arm-smmu-v3: Seize private ASID Message-ID: <20200917143846.GD134903@myrica> References: <20200817171558.325917-1-jean-philippe@linaro.org> <20200817171558.325917-10-jean-philippe@linaro.org> <7a67022c-a33a-5ea1-1bfb-4154d83ca009@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <7a67022c-a33a-5ea1-1bfb-4154d83ca009@redhat.com> Cc: fenghua.yu@intel.com, will@kernel.org, catalin.marinas@arm.com, linux-mm@kvack.org, iommu@lists.linux-foundation.org, zhangfei.gao@linaro.org, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Mon, Sep 07, 2020 at 06:41:11PM +0200, Auger Eric wrote: > > +/* > > + * Try to reserve this ASID in the SMMU. If it is in use, try to steal it from > > + * the private entry. Careful here, we may be modifying the context tables of > > + * another SMMU! > Not sure I got what you meant by this comment. That comment does need refreshing: /* * Check if the CPU ASID is available on the SMMU side. If a private context * descriptor is using it, try to replace it. */ > > + */ > > static struct arm_smmu_ctx_desc * > > arm_smmu_share_asid(struct mm_struct *mm, u16 asid) > > { > > + int ret; > > + u32 new_asid; > > struct arm_smmu_ctx_desc *cd; > > + struct arm_smmu_device *smmu; > > + struct arm_smmu_domain *smmu_domain; > > > > cd = xa_load(&arm_smmu_asid_xa, asid); > > if (!cd) > > @@ -27,8 +36,31 @@ arm_smmu_share_asid(struct mm_struct *mm, u16 asid) > > return cd; > > } > > > > - /* Ouch, ASID is already in use for a private cd. */ > > - return ERR_PTR(-EBUSY); > > + smmu_domain = container_of(cd, struct arm_smmu_domain, s1_cfg.cd); > > + smmu = smmu_domain->smmu; > > + > > + ret = xa_alloc(&arm_smmu_asid_xa, &new_asid, cd, > > + XA_LIMIT(1, 1 << smmu->asid_bits), GFP_KERNEL); > XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL) Good catch Thanks, Jean _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu