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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" S5P-MFC driver relied on the way the ARM DMA-IOMMU glue code worked - mainly it relied on the fact that the allocator used first-fit algorithm and the first allocated buffer were at 0x0 DMA/IOVA address. This is not true for the generic IOMMU-DMA glue code that will be used for ARM architecture soon, so limit the dma_mask to size of the DMA window the hardware can use and add the needed DMA attribute to force proper IOVA allocation of the firmware buffer. Signed-off-by: Marek Szyprowski --- drivers/media/platform/s5p-mfc/s5p_mfc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c index eba2b9f040df..171fd9fd22e4 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c @@ -1199,8 +1199,12 @@ static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev) if (!mfc_dev->mem_bitmap) return -ENOMEM; - mfc_dev->mem_virt = dma_alloc_coherent(dev, mem_size, - &mfc_dev->mem_base, GFP_KERNEL); + /* MFC v5 can access memory only via the 256M window */ + if (exynos_is_iommu_available(dev) && !IS_MFCV6_PLUS(mfc_dev)) + dma_set_mask_and_coherent(dev, SZ_256M - 1); + + mfc_dev->mem_virt = dma_alloc_attrs(dev, mem_size, &mfc_dev->mem_base, + GFP_KERNEL, DMA_ATTR_LOW_ADDRESS); if (!mfc_dev->mem_virt) { kfree(mfc_dev->mem_bitmap); dev_err(dev, "failed to preallocate %ld MiB for the firmware and context buffers\n", -- 2.17.1 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu