From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: "vkoul@kernel.org" <vkoul@kernel.org>,
"Tian, Kevin" <kevin.tian@intel.com>,
"Luck, Tony" <tony.luck@intel.com>,
"Jiang, Dave" <dave.jiang@intel.com>,
"Raj, Ashok" <ashok.raj@intel.com>,
David Woodhouse <dwmw2@infradead.org>,
LKML <linux-kernel@vger.kernel.org>,
Christoph Hellwig <hch@infradead.org>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
"zhangfei.gao@linaro.org" <zhangfei.gao@linaro.org>,
Jean-Philippe Brucker <jean-philippe@linaro.com>
Subject: Re: [PATCH v4 1/2] iommu/sva: Tighten SVA bind API with explicit flags
Date: Wed, 19 May 2021 08:46:08 -0700 [thread overview]
Message-ID: <20210519084608.3d498169@jacob-builder> (raw)
In-Reply-To: <20210517143758.GP1002214@nvidia.com>
Hi Jason,
On Mon, 17 May 2021 11:37:58 -0300, Jason Gunthorpe <jgg@nvidia.com> wrote:
> On Thu, May 13, 2021 at 04:40:28PM -0700, Jacob Pan wrote:
>
> > Looks like we are converging. Let me summarize the takeaways:
> > 1. Remove IOMMU_SVA_BIND_SUPERVISOR flag from this patch, in fact there
> > will be no flags at all for iommu_sva_bind_device()
> > 2. Remove all supervisor SVA related vt-d, idxd code.
> > 3. Create API iommu_setup_system_pasid_direct_map(option_flag)
> > if (option_flag == 1)
> > iommu_domain_alloc(IOMMU_DOMAIN_DMA);
> > if (option_flag == 2)
> > iommu_domain_alloc(IOMMU_DOMAIN_DIRECT); //new domain
> > type? setup IOMMU page tables mirroring the direct map
> > 4. Create API iommu_enable_dev_direct_map(struct dev, &pasid, &option)
> > - Drivers call this API to get the system PASID and which
> > option is available on the system PASID
> > - mark device as PASID only, perhaps a new flag in struct
> > device->dev_iommu->pasid_only = 1
> > 5. DMA API IOMMU vendor ops will take action based on the pasid_only
> > flag to decide if the mapping is for system PASID page tables.
> >
> > Does it make sense?
>
> I think you will run into trouble with that approach when you get to
> patches..
>
> For 'option 1' what you want is an API that is 'give me a PASID that
> is equivalent to the RID'.
>
> Then all the DMA API operations map IO page tables to both RID and
> PASID access. For the direct mode the PASID and RID will both point at
> the shared all physical memory IO page table.
>
> Otherwise the DMA API won't care if the device is using RID or PASID,
> if it needs to map a range it does it to the shared IO page table and
> flushes both the RID and PASID based caches.
>
> Then the driver will use the normal DMA API with its normal struct
> pci_device and simply tell the HW to do DMA TLP's with the returned
> PASID.
>
> For 'option 2' it should be a completely different API family.
>
Make sense, thanks for the suggestions.
> Jason
Thanks,
Jacob
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2021-05-19 15:43 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-10 13:25 [PATCH v4 0/2] Simplify and restrict IOMMU SVA APIs Jacob Pan
2021-05-10 13:25 ` [PATCH v4 1/2] iommu/sva: Tighten SVA bind API with explicit flags Jacob Pan
2021-05-10 23:37 ` Jason Gunthorpe
2021-05-11 3:31 ` Jacob Pan
2021-05-11 11:48 ` Jason Gunthorpe
2021-05-11 16:14 ` Jacob Pan
2021-05-11 16:35 ` Jason Gunthorpe
2021-05-11 18:05 ` Jacob Pan
2021-05-11 19:47 ` Jason Gunthorpe
2021-05-12 6:37 ` Christoph Hellwig
2021-05-13 13:00 ` Jacob Pan
2021-05-13 13:38 ` Jason Gunthorpe
2021-05-13 15:10 ` Jacob Pan
2021-05-13 16:44 ` Luck, Tony
2021-05-13 17:33 ` Jason Gunthorpe
2021-05-13 18:53 ` Luck, Tony
2021-05-13 19:00 ` Jason Gunthorpe
2021-05-13 19:14 ` Luck, Tony
2021-05-13 19:20 ` Jason Gunthorpe
2021-05-13 19:46 ` Jacob Pan
2021-05-13 19:57 ` Luck, Tony
2021-05-13 20:22 ` Jacob Pan
2021-05-13 22:31 ` Jason Gunthorpe
2021-05-13 23:40 ` Jacob Pan
2021-05-17 14:37 ` Jason Gunthorpe
2021-05-19 15:46 ` Jacob Pan [this message]
2021-05-12 10:18 ` Jean-Philippe Brucker
2021-05-10 13:25 ` [PATCH v4 2/2] iommu/sva: Remove mm parameter from SVA bind API Jacob Pan
2021-05-12 10:24 ` Jean-Philippe Brucker
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210519084608.3d498169@jacob-builder \
--to=jacob.jun.pan@linux.intel.com \
--cc=ashok.raj@intel.com \
--cc=dave.jiang@intel.com \
--cc=dwmw2@infradead.org \
--cc=hch@infradead.org \
--cc=iommu@lists.linux-foundation.org \
--cc=jean-philippe@linaro.com \
--cc=jgg@nvidia.com \
--cc=kevin.tian@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=tony.luck@intel.com \
--cc=vkoul@kernel.org \
--cc=zhangfei.gao@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).