From: Ben Widawsky <ben.widawsky@intel.com>
To: linux-cxl@vger.kernel.org
Cc: Ben Widawsky <ben.widawsky@intel.com>,
Andrew Donnellan <ajd@linux.ibm.com>,
linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
iommu@lists.linux-foundation.org,
Bjorn Helgaas <helgaas@kernel.org>,
"David E. Box" <david.e.box@linux.intel.com>,
David Woodhouse <dwmw2@infradead.org>,
Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH v2 7/9] cxl/pci: Use pci core's DVSEC functionality
Date: Thu, 23 Sep 2021 10:26:45 -0700 [thread overview]
Message-ID: <20210923172647.72738-8-ben.widawsky@intel.com> (raw)
In-Reply-To: <20210923172647.72738-1-ben.widawsky@intel.com>
Reduce maintenance burden of DVSEC query implementation by using the
centralized PCI core implementation.
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
---
drivers/cxl/pci.c | 20 +-------------------
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 5eaf2736f779..79d4d9b16d83 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -340,25 +340,7 @@ static void cxl_pci_unmap_regblock(struct cxl_mem *cxlm, struct cxl_register_map
static int cxl_pci_dvsec(struct pci_dev *pdev, int dvsec)
{
- int pos;
-
- pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DVSEC);
- if (!pos)
- return 0;
-
- while (pos) {
- u16 vendor, id;
-
- pci_read_config_word(pdev, pos + PCI_DVSEC_HEADER1, &vendor);
- pci_read_config_word(pdev, pos + PCI_DVSEC_HEADER2, &id);
- if (vendor == PCI_DVSEC_VENDOR_ID_CXL && dvsec == id)
- return pos;
-
- pos = pci_find_next_ext_capability(pdev, pos,
- PCI_EXT_CAP_ID_DVSEC);
- }
-
- return 0;
+ return pci_find_dvsec_capability(pdev, PCI_DVSEC_VENDOR_ID_CXL, dvsec);
}
static int cxl_probe_regs(struct cxl_mem *cxlm, struct cxl_register_map *map)
--
2.33.0
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next prev parent reply other threads:[~2021-09-23 17:43 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-23 17:26 [PATCH v2 0/9] cxl_pci refactor for reusability Ben Widawsky
2021-09-23 17:26 ` [PATCH v2 1/9] cxl: Convert "RBI" to enum Ben Widawsky
2021-09-27 23:13 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 2/9] cxl/pci: Remove dev_dbg for unknown register blocks Ben Widawsky
2021-09-28 14:37 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 3/9] cxl/pci: Remove pci request/release regions Ben Widawsky
2021-09-28 14:42 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 4/9] cxl/pci: Refactor cxl_pci_setup_regs Ben Widawsky
2021-09-28 17:35 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 5/9] cxl/pci: Make more use of cxl_register_map Ben Widawsky
2021-09-28 17:41 ` Dan Williams
2021-09-23 17:26 ` [PATCH v2 6/9] PCI: Add pci_find_dvsec_capability to find designated VSEC Ben Widawsky
2021-09-23 21:37 ` Liang, Kan
2021-09-27 17:46 ` Bjorn Helgaas
2021-09-28 5:50 ` Andrew Donnellan
2021-10-01 9:42 ` Jonathan Cameron
2021-09-23 17:26 ` Ben Widawsky [this message]
2021-09-28 17:43 ` [PATCH v2 7/9] cxl/pci: Use pci core's DVSEC functionality Dan Williams
2021-09-23 17:26 ` [PATCH v2 8/9] ocxl: " Ben Widawsky
2021-09-28 5:52 ` Andrew Donnellan
2021-09-23 17:26 ` [PATCH v2 9/9] iommu/vt-d: " Ben Widawsky
2021-09-24 6:42 ` Christoph Hellwig
2021-09-28 17:54 ` Dan Williams
2021-09-29 1:36 ` Lu Baolu
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