From: Jerry Snitselaar <jsnitsel@redhat.com>
To: Lu Baolu <baolu.lu@linux.intel.com>
Cc: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Kevin Tian <kevin.tian@intel.com>,
Jacob Pan <jacob.jun.pan@linux.intel.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] iommu/vt-d: Avoid unnecessary global IRTE cache invalidation
Date: Mon, 19 Sep 2022 01:29:19 -0700 [thread overview]
Message-ID: <20220919082919.ekv6p47y2nnmpswk@cantor> (raw)
In-Reply-To: <20220919062523.3438951-2-baolu.lu@linux.intel.com>
On Mon, Sep 19, 2022 at 02:25:22PM +0800, Lu Baolu wrote:
> Some VT-d hardware implementations invalidate all interrupt remapping
> hardware translation caches as part of SIRTP flow. The VT-d spec adds
> a ESIRTPS (Enhanced Set Interrupt Remap Table Pointer Support, section
> 11.4.2 in VT-d spec) capability bit to indicate this. With this bit set,
> software has no need to issue the global invalidation request.
>
> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com
> ---
> drivers/iommu/intel/iommu.h | 1 +
> drivers/iommu/intel/irq_remapping.c | 3 ++-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h
> index eef1a166b855..5407d82df4d1 100644
> --- a/drivers/iommu/intel/iommu.h
> +++ b/drivers/iommu/intel/iommu.h
> @@ -146,6 +146,7 @@
> /*
> * Decoding Capability Register
> */
> +#define cap_esirtps(c) (((c) >> 62) & 1)
> #define cap_fl5lp_support(c) (((c) >> 60) & 1)
> #define cap_pi_support(c) (((c) >> 59) & 1)
> #define cap_fl1gp_support(c) (((c) >> 56) & 1)
> diff --git a/drivers/iommu/intel/irq_remapping.c b/drivers/iommu/intel/irq_remapping.c
> index 2e9683e970f8..b4a91fbd1c2f 100644
> --- a/drivers/iommu/intel/irq_remapping.c
> +++ b/drivers/iommu/intel/irq_remapping.c
> @@ -494,7 +494,8 @@ static void iommu_set_irq_remapping(struct intel_iommu *iommu, int mode)
> * Global invalidation of interrupt entry cache to make sure the
> * hardware uses the new irq remapping table.
> */
> - qi_global_iec(iommu);
> + if (!cap_esirtps(iommu->cap))
> + qi_global_iec(iommu);
> }
>
> static void iommu_enable_irq_remapping(struct intel_iommu *iommu)
> --
> 2.34.1
>
next prev parent reply other threads:[~2022-09-19 8:29 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-19 6:25 [PATCH 0/2] iommu/vt-d: Add ESRTPS & ESIRTPS check Lu Baolu
2022-09-19 6:25 ` [PATCH 1/2] iommu/vt-d: Avoid unnecessary global IRTE cache invalidation Lu Baolu
2022-09-19 8:29 ` Jerry Snitselaar [this message]
2022-09-20 7:51 ` Tian, Kevin
2022-09-21 6:49 ` Baolu Lu
2022-09-19 6:25 ` [PATCH 2/2] iommu/vt-d: Avoid unnecessary global DMA " Lu Baolu
2022-09-19 8:30 ` Jerry Snitselaar
2022-09-20 7:51 ` Tian, Kevin
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