[PATCH 00/21] iommu/amd: Preparation for SVA Support (Part 1 of 2)

From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH 00/21] iommu/amd: Preparation for SVA Support (Part 1 of 2)
Date: Wed, 12 Jul 2023 14:14:55 +0000	[thread overview]
Message-ID: <20230712141516.154144-1-vasant.hegde@amd.com> (raw)

This is part 1 of the 2-part series to introduce Share Virtual Address
(SVA) support, which focuses on cleaning up and refactoring the existing
code in preparation for subsequent series.

It contains the following enhancements:

* Patch 1 - 7:
  Clean up and refactoring. No functional changes.

* Patch 8 - 11:
  Miscellaneous improvements.

* Patch 12 - 15:
  Introduce new set of AMD IOMMU protection domain flags, which simplifies
  domain manangements.

* Patch 16 - 21:
  Modify logic to independently enable PCI capabilities (ATS/PASID/PRI)
  for devices. This allows more flexibility in preparation for SVA and
  IOPF supports.

This patch series is based on top of upstream v6.5-rc1 and below set of patches.
  - iommu/amd: Add PPR overflow support
    https://lore.kernel.org/linux-iommu/20230628051624.5792-1-vasant.hegde@amd.com/T/#t

  - iommu/amd: Interrupt handling improvements
    https://lore.kernel.org/linux-iommu/20230628053222.5962-1-vasant.hegde@amd.com/T/#t

  - iommu/amd: Consolidate PPR log handling
    https://lore.kernel.org/linux-iommu/20230628054554.6131-1-vasant.hegde@amd.com/

This is also available at github :
  - https://github.com/AMDESE/linux/tree/iommu_sva_v1_part1_v6.5_rc1

Thank you,
Vasant / Suravee

Suravee Suthikulpanit (10):
  iommu/amd: Remove unused amd_io_pgtable.pt_root variable
  iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h
  iommu/amd: Consolidate logic to allocate protection domain
  iommu/amd: Introduce helper functions for managing GCR3 table
  iommu/amd: Use struct protection_domain in helper functions
  iommu/amd: Miscellaneous clean up when free domain
  iommu/amd: Modify logic for checking GT and PPR features
  iommu/amd: Clean up and enhance protection domain flags
  iommu/amd: Consolidate logic for setting up v2 API mode
  iommu/amd: Refactor domain allocation code for v2DMA mode

Vasant Hegde (11):
  iommu/amd: Refactor protection domain allocation code
  iommu/amd/iommu_v2: Use protection_domain in struct device_state
  iommu/amd: Do not set amd_iommu_pgtable in pass-through mode
  iommu/amd: Use protection_domain.flags to check page table mode
  iommu/amd: Setup v2 domain with max pasids
  iommu/amd: Introduce iommu_dev_data.flags to track device capabilities
  iommu/amd: Rename ats related variables
  iommu/amd: Enable device ATS/PASID/PRI capabilities independently
  iommu/amd: Delay enabling PRI to after initializing domain
  iommu/amd: Initialize iommu_device->max_pasids
  iommu/amd: Simplify amd_iommu_device_info()

 drivers/iommu/amd/amd_iommu.h       |  35 +-
 drivers/iommu/amd/amd_iommu_types.h |  50 ++-
 drivers/iommu/amd/init.c            |  37 +-
 drivers/iommu/amd/io_pgtable_v2.c   |  16 +-
 drivers/iommu/amd/iommu.c           | 661 ++++++++++++++++------------
 drivers/iommu/amd/iommu_v2.c        |  38 +-
 6 files changed, 465 insertions(+), 372 deletions(-)

-- 
2.31.1