From: Robin Murphy <robin.murphy@arm.com>
To: will@kernel.org
Cc: iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] iommu/io-pgtable-arm: Rationalise MAIR handling
Date: Mon, 19 Aug 2019 19:19:28 +0100 [thread overview]
Message-ID: <2aada213eb24e56a1ac74e6e2b0b9e99f664edd1.1566238530.git.robin.murphy@arm.com> (raw)
In-Reply-To: <cover.1566238530.git.robin.murphy@arm.com>
Between VMSAv8-64 and the various 32-bit formats, there is either one
64-bit MAIR or a pair of 32-bit MAIR0/MAIR1 or NMRR/PMRR registers.
As such, keeping two 64-bit values in io_pgtable_cfg has always been
overkill.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
drivers/iommu/arm-smmu-v3.c | 2 +-
drivers/iommu/arm-smmu.c | 4 ++--
drivers/iommu/io-pgtable-arm.c | 5 ++---
drivers/iommu/ipmmu-vmsa.c | 2 +-
drivers/iommu/qcom_iommu.c | 4 ++--
include/linux/io-pgtable.h | 2 +-
6 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index a9a9fabd3968..2a8db896d698 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1724,7 +1724,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain,
cfg->cd.asid = (u16)asid;
cfg->cd.ttbr = pgtbl_cfg->arm_lpae_s1_cfg.ttbr[0];
cfg->cd.tcr = pgtbl_cfg->arm_lpae_s1_cfg.tcr;
- cfg->cd.mair = pgtbl_cfg->arm_lpae_s1_cfg.mair[0];
+ cfg->cd.mair = pgtbl_cfg->arm_lpae_s1_cfg.mair;
return 0;
out_free_asid:
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 523a88842e7f..184ca41e9de7 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -491,8 +491,8 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain,
cb->mair[0] = pgtbl_cfg->arm_v7s_cfg.prrr;
cb->mair[1] = pgtbl_cfg->arm_v7s_cfg.nmrr;
} else {
- cb->mair[0] = pgtbl_cfg->arm_lpae_s1_cfg.mair[0];
- cb->mair[1] = pgtbl_cfg->arm_lpae_s1_cfg.mair[1];
+ cb->mair[0] = pgtbl_cfg->arm_lpae_s1_cfg.mair;
+ cb->mair[1] = pgtbl_cfg->arm_lpae_s1_cfg.mair >> 32;
}
}
}
diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index 161a7d56264d..c588ba0dd4d1 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c
@@ -859,8 +859,7 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie)
(ARM_LPAE_MAIR_ATTR_INC_OWBRWA
<< ARM_LPAE_MAIR_ATTR_SHIFT(ARM_LPAE_MAIR_ATTR_IDX_INC_OCACHE));
- cfg->arm_lpae_s1_cfg.mair[0] = reg;
- cfg->arm_lpae_s1_cfg.mair[1] = 0;
+ cfg->arm_lpae_s1_cfg.mair = reg;
/* Looking good; allocate a pgd */
data->pgd = __arm_lpae_alloc_pages(data->pgd_size, GFP_KERNEL, cfg);
@@ -1024,7 +1023,7 @@ arm_mali_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie)
u64 mair, ttbr;
/* Copy values as union fields overlap */
- mair = cfg->arm_lpae_s1_cfg.mair[0];
+ mair = cfg->arm_lpae_s1_cfg.mair;
ttbr = cfg->arm_lpae_s1_cfg.ttbr[0];
cfg->arm_mali_lpae_cfg.memattr = mair;
diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
index ad0098c0c87c..9075e53a748b 100644
--- a/drivers/iommu/ipmmu-vmsa.c
+++ b/drivers/iommu/ipmmu-vmsa.c
@@ -436,7 +436,7 @@ static void ipmmu_domain_setup_context(struct ipmmu_vmsa_domain *domain)
/* MAIR0 */
ipmmu_ctx_write_root(domain, IMMAIR0,
- domain->cfg.arm_lpae_s1_cfg.mair[0]);
+ domain->cfg.arm_lpae_s1_cfg.mair);
/* IMBUSCR */
if (domain->mmu->features->setup_imbuscr)
diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
index a2062d13584f..34bb357b3cfa 100644
--- a/drivers/iommu/qcom_iommu.c
+++ b/drivers/iommu/qcom_iommu.c
@@ -262,9 +262,9 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain,
/* MAIRs (stage-1 only) */
iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR0,
- pgtbl_cfg.arm_lpae_s1_cfg.mair[0]);
+ pgtbl_cfg.arm_lpae_s1_cfg.mair);
iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR1,
- pgtbl_cfg.arm_lpae_s1_cfg.mair[1]);
+ pgtbl_cfg.arm_lpae_s1_cfg.mair >> 32);
/* SCTLR */
reg = SCTLR_CFIE | SCTLR_CFRE | SCTLR_AFE | SCTLR_TRE |
diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h
index b5a450a3bb47..a6c8aa204733 100644
--- a/include/linux/io-pgtable.h
+++ b/include/linux/io-pgtable.h
@@ -92,7 +92,7 @@ struct io_pgtable_cfg {
struct {
u64 ttbr[2];
u64 tcr;
- u64 mair[2];
+ u64 mair;
} arm_lpae_s1_cfg;
struct {
--
2.21.0.dirty
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next prev parent reply other threads:[~2019-08-19 18:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-19 18:19 [PATCH 0/4] iommu/io-pgtable: Cleanup and prep for split tables Robin Murphy
2019-08-19 18:19 ` Robin Murphy [this message]
2019-08-19 18:19 ` [PATCH 2/4] iommu/io-pgtable-arm: Rationalise TTBRn handling Robin Murphy
2019-08-20 10:19 ` Will Deacon
2019-08-20 14:17 ` Robin Murphy
2019-08-20 15:50 ` Will Deacon
2019-08-19 18:19 ` [PATCH 3/4] iommu/io-pgtable-arm: Rationalise TCR handling Robin Murphy
2019-08-20 10:31 ` Will Deacon
2019-08-20 15:25 ` Robin Murphy
2019-08-20 16:07 ` Will Deacon
2019-08-20 18:41 ` Robin Murphy
2019-08-21 12:11 ` Will Deacon
2019-08-21 12:56 ` Robin Murphy
2019-10-03 17:33 ` Jordan Crouse
2019-10-24 10:51 ` Will Deacon
2019-10-24 11:23 ` Robin Murphy
2019-10-24 11:40 ` Will Deacon
2019-08-20 16:23 ` Jordan Crouse
2019-08-19 18:19 ` [PATCH 4/4] iommu/io-pgtable-arm: Prepare for TTBR1 usage Robin Murphy
2019-08-19 22:34 ` Jordan Crouse
2019-08-20 13:51 ` Robin Murphy
2019-08-20 10:30 ` Will Deacon
2019-08-20 14:51 ` Robin Murphy
2019-08-20 15:58 ` Will Deacon
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