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Sun, 16 Aug 2020 08:42:31 -0400 X-MC-Unique: GM2mls39OEmSR4fc2P72oQ-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id C88AB100558D; Sun, 16 Aug 2020 12:42:29 +0000 (UTC) Received: from [10.36.113.93] (ovpn-113-93.ams2.redhat.com [10.36.113.93]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 14014702FF; Sun, 16 Aug 2020 12:42:18 +0000 (UTC) Subject: Re: [PATCH v6 06/15] iommu/vt-d: Support setting ioasid set to domain To: "Liu, Yi L" , "alex.williamson@redhat.com" , "baolu.lu@linux.intel.com" , "joro@8bytes.org" References: <1595917664-33276-1-git-send-email-yi.l.liu@intel.com> <1595917664-33276-7-git-send-email-yi.l.liu@intel.com> From: Auger Eric Message-ID: <2e161928-b6c5-784d-8233-2505f9feb87c@redhat.com> Date: Sun, 16 Aug 2020 14:42:17 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Cc: "jean-philippe@linaro.org" , "Tian, Kevin" , "Raj, Ashok" , "kvm@vger.kernel.org" , "stefanha@gmail.com" , "Tian, Jun J" , "iommu@lists.linux-foundation.org" , "linux-kernel@vger.kernel.org" , "Sun, Yi Y" , "Wu, Hao" X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On 8/14/20 10:04 AM, Liu, Yi L wrote: > Hi Eric, > >> From: Auger Eric >> Sent: Thursday, August 13, 2020 11:07 PM >> >> Hi Yi, >> >> On 7/28/20 8:27 AM, Liu Yi L wrote: >>> From IOMMU p.o.v., PASIDs allocated and managed by external components >>> (e.g. VFIO) will be passed in for gpasid_bind/unbind operation. IOMMU >>> needs some knowledge to check the PASID ownership, hence add an >>> interface for those components to tell the PASID owner. >>> >>> In latest kernel design, PASID ownership is managed by IOASID set >>> where the PASID is allocated from. This patch adds support for setting >>> ioasid set ID to the domains used for nesting/vSVA. Subsequent SVA >>> operations will check the PASID against its IOASID set for proper ownership. >>> >>> Cc: Kevin Tian >>> CC: Jacob Pan >>> Cc: Alex Williamson >>> Cc: Eric Auger >>> Cc: Jean-Philippe Brucker >>> Cc: Joerg Roedel >>> Cc: Lu Baolu >>> Signed-off-by: Liu Yi L >>> Signed-off-by: Jacob Pan >>> --- >>> v5 -> v6: >>> *) address comments against v5 from Eric Auger. >>> >>> v4 -> v5: >>> *) address comments from Eric Auger. >>> --- >>> drivers/iommu/intel/iommu.c | 23 +++++++++++++++++++++++ >>> include/linux/intel-iommu.h | 4 ++++ >>> include/linux/iommu.h | 1 + >>> 3 files changed, 28 insertions(+) >>> >>> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c >>> index ed4b71c..b2fe54e 100644 >>> --- a/drivers/iommu/intel/iommu.c >>> +++ b/drivers/iommu/intel/iommu.c >>> @@ -1793,6 +1793,7 @@ static struct dmar_domain *alloc_domain(int flags) >>> if (first_level_by_default()) >>> domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL; >>> domain->has_iotlb_device = false; >>> + domain->ioasid_sid = INVALID_IOASID_SET; >>> INIT_LIST_HEAD(&domain->devices); >>> >>> return domain; >>> @@ -6040,6 +6041,28 @@ intel_iommu_domain_set_attr(struct iommu_domain >> *domain, >>> } >>> spin_unlock_irqrestore(&device_domain_lock, flags); >>> break; >>> + case DOMAIN_ATTR_IOASID_SID: >>> + { >>> + int sid = *(int *)data; >> >>> + >>> + spin_lock_irqsave(&device_domain_lock, flags); >>> + if (!(dmar_domain->flags & DOMAIN_FLAG_NESTING_MODE)) { >>> + ret = -ENODEV; >>> + spin_unlock_irqrestore(&device_domain_lock, flags); >>> + break; >>> + } >>> + if (dmar_domain->ioasid_sid != INVALID_IOASID_SET && >>> + dmar_domain->ioasid_sid != sid) { >>> + pr_warn_ratelimited("multi ioasid_set (%d:%d) setting", >>> + dmar_domain->ioasid_sid, sid); >>> + ret = -EBUSY; >>> + spin_unlock_irqrestore(&device_domain_lock, flags); >>> + break; >>> + } >>> + dmar_domain->ioasid_sid = sid; >>> + spin_unlock_irqrestore(&device_domain_lock, flags); >>> + break; >> nit: Adding a small helper >> int__set_ioasid_sid(struct dmar_domain *dmar_domain, int sid_id) >> >> may simplify the lock handling > > ok. will do. > >> >>> + } >>> default: >>> ret = -EINVAL; >>> break; >>> diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h >>> index 3f23c26..0d0ab32 100644 >>> --- a/include/linux/intel-iommu.h >>> +++ b/include/linux/intel-iommu.h >>> @@ -549,6 +549,10 @@ struct dmar_domain { >>> 2 == 1GiB, 3 == 512GiB, 4 == 1TiB */ >>> u64 max_addr; /* maximum mapped address */ >>> >>> + int ioasid_sid; /* >>> + * the ioasid set which tracks all >> id of the ioasid set? > > should be ioasid_set. however, ioasid_alloc_set() returns sid in Jacob's > series. but, I heard from Jacob, he will remove ioasid_sid, and return > ioasid_set. so I will modify it once his patch is sent out. > > https://lore.kernel.org/linux-iommu/1585158931-1825-4-git-send-email-jacob.jun.pan@linux.intel.com/ OK Thanks Eric > >>> + * PASIDs used by the domain. >>> + */ >>> int default_pasid; /* >>> * The default pasid used for non-SVM >>> * traffic on mediated devices. >>> diff --git a/include/linux/iommu.h b/include/linux/iommu.h index >>> 4a02c9e..b1ff702 100644 >>> --- a/include/linux/iommu.h >>> +++ b/include/linux/iommu.h >>> @@ -124,6 +124,7 @@ enum iommu_attr { >>> DOMAIN_ATTR_FSL_PAMUV1, >>> DOMAIN_ATTR_NESTING, /* two stages of translation */ >>> DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE, >>> + DOMAIN_ATTR_IOASID_SID, >>> DOMAIN_ATTR_MAX, >>> }; >>> >>> >> Besides >> Reviewed-by: Eric Auger > > thanks :-) > > Regards, > Yi Liu > >> >> Eric > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu