From: Tomasz Nowicki <tn@semihalf.com>
To: Robin Murphy <robin.murphy@arm.com>,
will@kernel.org, joro@8bytes.org, gregory.clement@bootlin.com,
robh+dt@kernel.org, hannah@marvell.com
Cc: devicetree@vger.kernel.org, catalin.marinas@arm.com,
linux-kernel@vger.kernel.org, nadavh@marvell.com,
iommu@lists.linux-foundation.org, mw@semihalf.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 4/4] arm64: dts: marvell: add SMMU support
Date: Fri, 3 Jul 2020 11:33:20 +0200 [thread overview]
Message-ID: <3d9b3d16-00e4-d3b5-344b-8515c70fb83e@semihalf.com> (raw)
In-Reply-To: <ba29e839-79e0-7189-f735-d457544135e4@arm.com>
On 03.07.2020 11:16, Robin Murphy wrote:
> On 2020-07-02 21:16, Tomasz Nowicki wrote:
>> From: Marcin Wojtas <mw@semihalf.com>
>>
>> Add IOMMU node for Marvell AP806 based SoCs together with platform
>> and PCI device Stream ID mapping.
>>
>> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
>> Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
>> ---
>> arch/arm64/boot/dts/marvell/armada-8040.dtsi | 36 +++++++++++++++++++
>> arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 17 +++++++++
>> 2 files changed, 53 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/marvell/armada-8040.dtsi
>> b/arch/arm64/boot/dts/marvell/armada-8040.dtsi
>> index 7699b19224c2..25c1df709f72 100644
>> --- a/arch/arm64/boot/dts/marvell/armada-8040.dtsi
>> +++ b/arch/arm64/boot/dts/marvell/armada-8040.dtsi
>> @@ -23,3 +23,39 @@
>> &cp0_rtc {
>> status = "disabled";
>> };
>> +
>> +&cp0_usb3_0 {
>> + iommus = <&smmu 0x440>;
>> +};
>> +
>> +&cp0_usb3_1 {
>> + iommus = <&smmu 0x441>;
>> +};
>> +
>> +&cp0_sata0 {
>> + iommus = <&smmu 0x444>;
>> +};
>> +
>> +&cp0_sdhci0 {
>> + iommus = <&smmu 0x445>;
>> +};
>> +
>> +&cp1_sata0 {
>> + iommus = <&smmu 0x454>;
>> +};
>> +
>> +&cp1_usb3_0 {
>> + iommus = <&smmu 0x450>;
>> +};
>> +
>> +&cp1_usb3_1 {
>> + iommus = <&smmu 0x451>;
>> +};
>> +
>> +&cp0_pcie0 {
>> + iommu-map =
>> + <0x0 &smmu 0x480 0x20>,
>> + <0x100 &smmu 0x4a0 0x20>,
>> + <0x200 &smmu 0x4c0 0x20>;
>> + iommu-map-mask = <0x031f>;
>
> Nice! I do like a good compressed mapping :D
>
>> +};
>> diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
>> b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
>> index 7f9b9a647717..ded8b8082d79 100644
>> --- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
>> +++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
>> @@ -56,6 +56,23 @@
>> compatible = "simple-bus";
>> ranges = <0x0 0x0 0xf0000000 0x1000000>;
>> + smmu: iommu@5000000 {
>> + compatible = "marvell,ap806-smmu-500", "arm,mmu-500";
>> + reg = <0x100000 0x100000>;
>> + dma-coherent;
>> + #iommu-cells = <1>;
>> + #global-interrupts = <1>;
>> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
>
> I'd recommend you have the node disabled by default here, then
> explicitly enable it in armada-8040.dtsi where you add the Stream IDs.
> Otherwise it will also end up enabled for 8020, 70x0, etc. where
> disable_bypass will then catastrophically break everything.
>
Good point! I will fix this.
Thanks,
Tomasz
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2020-07-03 9:33 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-02 20:16 [PATCH v3 0/4] Add system mmu support for Armada-806 Tomasz Nowicki
2020-07-02 20:16 ` [PATCH v3 1/4] iommu/arm-smmu: Add SMMU ID2 register fixup hook Tomasz Nowicki
2020-07-03 8:24 ` Robin Murphy
2020-07-03 9:19 ` Tomasz Nowicki
2020-07-02 20:16 ` [PATCH v3 2/4] iommu/arm-smmu: Workaround for Marvell Armada-AP806 SoC erratum #582743 Tomasz Nowicki
2020-07-03 9:03 ` Robin Murphy
2020-07-03 11:24 ` Tomasz Nowicki
2020-07-02 20:16 ` [PATCH v3 3/4] dt-bindings: arm-smmu: add compatible string for Marvell Armada-AP806 SMMU-500 Tomasz Nowicki
2020-07-03 9:05 ` Robin Murphy
2020-07-03 9:26 ` Tomasz Nowicki
2020-07-13 21:36 ` Rob Herring
2020-07-02 20:16 ` [PATCH v3 4/4] arm64: dts: marvell: add SMMU support Tomasz Nowicki
2020-07-03 9:16 ` Robin Murphy
2020-07-03 9:33 ` Tomasz Nowicki [this message]
2020-07-03 10:38 ` Marcin Wojtas
2020-07-14 8:19 ` [PATCH v3 0/4] Add system mmu support for Armada-806 Will Deacon
2020-07-14 10:26 ` Tomasz Nowicki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3d9b3d16-00e4-d3b5-344b-8515c70fb83e@semihalf.com \
--to=tn@semihalf.com \
--cc=catalin.marinas@arm.com \
--cc=devicetree@vger.kernel.org \
--cc=gregory.clement@bootlin.com \
--cc=hannah@marvell.com \
--cc=iommu@lists.linux-foundation.org \
--cc=joro@8bytes.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mw@semihalf.com \
--cc=nadavh@marvell.com \
--cc=robh+dt@kernel.org \
--cc=robin.murphy@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).