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Tue, 10 Mar 2020 14:00:52 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 552FFC43637; Tue, 10 Mar 2020 14:00:51 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6F530C432C2; Tue, 10 Mar 2020 14:00:50 +0000 (UTC) MIME-Version: 1.0 Date: Tue, 10 Mar 2020 19:30:50 +0530 From: Sibi Sankar To: Joerg Roedel Subject: Re: [PATCH 0/3] Request direct mapping for modem firmware subdevice In-Reply-To: <20200310112332.GG3794@8bytes.org> References: <20200309182255.20142-1-sibis@codeaurora.org> <20200310112332.GG3794@8bytes.org> Message-ID: <4ed6ddd667a3e6f670084a443d141474@codeaurora.org> X-Sender: sibis@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Cc: ohad@wizery.com, devicetree@vger.kernel.org, linux-kernel-owner@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, bjorn.andersson@linaro.org, iommu@lists.linux-foundation.org, robh+dt@kernel.org, agross@kernel.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Hey Joerg, Thanks for taking time to review the series! On 2020-03-10 16:53, Joerg Roedel wrote: > On Mon, Mar 09, 2020 at 11:52:52PM +0530, Sibi Sankar wrote: >> The Q6 modem sub-system has direct access to DDR through memnoc and >> an indirect access routed through a SMMU which MSS CE (crypto engine >> sub-component of MSS) uses during out of reset sequence. Request >> direct >> mapping for the modem-firmware subdevice since smmu is not expected >> to provide access control/translation for these SIDs (sandboxing of >> the >> modem is achieved through XPUs engaged using SMC calls). > > So the DMA accesses are initiated by the firmware and need to be direct > mapped? Which memory region do they access? The accesses are initiated by the firmware and they access modem reserved regions. However as explained in ^^ any accesses outside the region will result in a violation and is controlled through XPUs (protection units). With ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT y the firmware SIDs will explicitly need to be directly mapped to avoid observing global faults in the absence of secure firmware (TrustZone) programming the modem SIDs as S2CR-Bypass. > > Regards, > > Joerg -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project. _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu