From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: iommu@lists.linux-foundation.org, Jon.Grimm@amd.com,
brijesh.singh@amd.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/3] iommu: amd: Add support for RMP_PAGE_FAULT and RMP_HW_ERR
Date: Wed, 23 Sep 2020 18:04:07 +0700 [thread overview]
Message-ID: <64ffa498-990d-2086-eff3-bac70f674e88@amd.com> (raw)
In-Reply-To: <20200918093117.GO31590@8bytes.org>
On 9/18/20 4:31 PM, Joerg Roedel wrote:
> Hi Suravee,
>
> On Wed, Sep 16, 2020 at 01:55:48PM +0000, Suravee Suthikulpanit wrote:
>> +static void amd_iommu_report_rmp_hw_error(volatile u32 *event)
>> +{
>> + struct pci_dev *pdev;
>> + struct iommu_dev_data *dev_data = NULL;
>> + int devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK;
>> + int vmg_tag = (event[1]) & 0xFFFF;
>> + int flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK;
>> + u64 spa = ((u64)event[3] << 32) | (event[2] & 0xFFFFFFF8);
>
> Please write this as:
>
> struct iommu_dev_data *dev_data = NULL;
> int devid, vmg_tag, flags;
> struct pci_dev *pdev;
> u64 spa;
>
> devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK;
> vmg_tag = (event[1]) & 0xFFFF;
> flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK;
> spa = ((u64)event[3] << 32) | (event[2] & 0xFFFFFFF8);
>
> Same applied the the next function.
>
>> +
>> + pdev = pci_get_domain_bus_and_slot(0, PCI_BUS_NUM(devid),
>> + devid & 0xff);
>> + if (pdev)
>> + dev_data = dev_iommu_priv_get(&pdev->dev);
>> +
>> + if (dev_data && __ratelimit(&dev_data->rs)) {
>> + pci_err(pdev, "Event logged [RMP_HW_ERROR devid=0x%04x, vmg_tag=0x%04x, spa=0x%llx, flags=0x%04x]\n",
>> + devid, vmg_tag, spa, flags);
>
> Printing the devid is not really needed here, no? Same issue in the next
> function.
I'll update the patch and will send out V2.
Thanks,
Suravee
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2020-09-23 11:04 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-16 13:55 [PATCH 0/3] amd : iommu : Initial IOMMU support for SNP Suravee Suthikulpanit
2020-09-16 13:55 ` [PATCH 1/3] iommu: amd: Use 4K page for completion wait write-back semaphore Suravee Suthikulpanit
2020-09-16 13:55 ` [PATCH 2/3] iommu: amd: Add support for RMP_PAGE_FAULT and RMP_HW_ERR Suravee Suthikulpanit
2020-09-18 9:31 ` Joerg Roedel
2020-09-23 11:04 ` Suravee Suthikulpanit [this message]
2020-09-16 13:55 ` [PATCH 3/3] iommu: amd: Re-purpose Exclusion range registers to support SNP CWWB Suravee Suthikulpanit
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=64ffa498-990d-2086-eff3-bac70f674e88@amd.com \
--to=suravee.suthikulpanit@amd.com \
--cc=Jon.Grimm@amd.com \
--cc=brijesh.singh@amd.com \
--cc=iommu@lists.linux-foundation.org \
--cc=joro@8bytes.org \
--cc=linux-kernel@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).