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Fri, 29 Nov 2019 09:57:23 -0800 (PST) Received: from [10.83.36.220] ([217.173.96.166]) by smtp.gmail.com with ESMTPSA id s7sm9962922pfe.22.2019.11.29.09.57.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Nov 2019 09:57:22 -0800 (PST) Mime-Version: 1.0 (Mac OS X Mail 12.2 \(3445.102.3\)) Subject: [PATCH v5 3/3] PCI: Add DMA alias quirk for PLX PEX NTB In-Reply-To: <07D724A1-308F-44C3-8937-EE0C21EF3170@arista.com> Date: Fri, 29 Nov 2019 17:57:20 +0000 Message-Id: <7B1FC6DB-18D2-4946-A0AF-9C1EC626D3B7@arista.com> References: <20191120193228.GA103670@google.com> <6A902F0D-FE98-4760-ADBB-4D5987D866BE@arista.com> <20191126173833.GA16069@infradead.org> <547214A9-9FD0-4DD5-80E1-1F5A467A0913@arista.com> <9c54c5dd-702c-a19b-38ba-55ab73b24729@deltatee.com> <435064D4-00F0-47F5-94D2-2C354F6B1206@arista.com> <058383d9-69fe-65e3-e410-eebd99840261@deltatee.com> <9DD82D05-6B9E-4AF5-9A3C-D459B75C0089@arista.com> <07D724A1-308F-44C3-8937-EE0C21EF3170@arista.com> To: linux-pci@vger.kernel.org X-Mailer: Apple Mail (2.3445.102.3) Cc: Alex Williamson , Dmitry Safonov , Dmitry Safonov <0x7f454c46@gmail.com>, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Bjorn Helgaas , Logan Gunthorpe X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: James Sewart via iommu Reply-To: James Sewart Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" The PLX PEX NTB forwards DMA transactions using Requester ID's that don't exist as PCI devices. The devfn for a transaction is used as an index into a lookup table storing the origin of a transaction on the other side of the bridge. This patch aliases all possible devfn's to the NTB device so that any transaction coming in is governed by the mappings for the NTB. Reviewed-by: Logan Gunthorpe Signed-off-by: James Sewart --- drivers/pci/quirks.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 0f3f5afc73fd..3a67049ca630 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5315,6 +5315,21 @@ SWITCHTEC_QUIRK(0x8574); /* PFXI 64XG3 */ SWITCHTEC_QUIRK(0x8575); /* PFXI 80XG3 */ SWITCHTEC_QUIRK(0x8576); /* PFXI 96XG3 */ +/* + * PLX NTB uses devfn proxy IDs to move TLPs between NT endpoints. These IDs + * are used to forward responses to the originator on the other side of the + * NTB. Alias all possible IDs to the NTB to permit access when the IOMMU is + * turned on. + */ +static void quirk_plx_ntb_dma_alias(struct pci_dev *pdev) +{ + pci_info(pdev, "Setting PLX NTB proxy ID aliases\n"); + /* PLX NTB may use all 256 devfns */ + pci_add_dma_alias(pdev, 0, 256); +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x87b0, quirk_plx_ntb_dma_alias); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, 0x87b1, quirk_plx_ntb_dma_alias); + /* * On Lenovo Thinkpad P50 SKUs with a Nvidia Quadro M1000M, the BIOS does * not always reset the secondary Nvidia GPU between reboots if the system -- 2.24.0 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu