From: Dave Hansen <dave.hansen@intel.com>
To: Andy Lutomirski <luto@kernel.org>
Cc: Ravi V Shankar <ravi.v.shankar@intel.com>,
Peter Zijlstra <peterz@infradead.org>,
H Peter Anvin <hpa@zytor.com>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
Dave Jiang <dave.jiang@intel.com>,
Ashok Raj <ashok.raj@intel.com>, x86 <x86@kernel.org>,
amd-gfx <amd-gfx@lists.freedesktop.org>,
Christoph Hellwig <hch@infradead.org>,
Ingo Molnar <mingo@redhat.com>, Fenghua Yu <fenghua.yu@intel.com>,
Borislav Petkov <bp@alien8.de>,
Thomas Gleixner <tglx@linutronix.de>,
Tony Luck <tony.luck@intel.com>,
Felix Kuehling <Felix.Kuehling@amd.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
iommu <iommu@lists.linux-foundation.org>,
Jacob Jun Pan <jacob.jun.pan@intel.com>,
David Woodhouse <dwmw2@infradead.org>
Subject: Re: [PATCH v6 12/12] x86/traps: Fix up invalid PASID
Date: Mon, 3 Aug 2020 10:34:13 -0700 [thread overview]
Message-ID: <92a14516-1f63-5b5f-7f30-8870fe343c8e@intel.com> (raw)
In-Reply-To: <CALCETrWR1hL=eXAkn=OG1vtAPvC9n1jGqyNuyXpYw8QwPENo1A@mail.gmail.com>
On 8/3/20 10:16 AM, Andy Lutomirski wrote:
> - TILE: genuinely per-thread, but it's expensive so it's
> lazy-loadable. But the lazy-load mechanism reuses #NM, and it's not
> fully disambiguated from the other use of #NM. So it sort of works,
> but it's gross.
For those playing along at home, there's a new whitepaper out from Intel
about some new CPU features which are going to be fun:
> https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
Which part were you worried about? I thought it was fully disambuguated
from this:
> When XFD causes an instruction to generate #NM, the processor loads
> the IA32_XFD_ERR MSR to identify the disabled state component(s).
> Specifically, the MSR is loaded with the logical AND of the IA32_XFD
> MSR and the bitmap corresponding to the state components required by
> the faulting instruction.
>
> Device-not-available exceptions that are not due to XFD — those
> resulting from setting CR0.TS to 1 — do not modify the IA32_XFD_ERR
> MSR.
So if you always make sure to *clear* IA32_XFD_ERR after handing and XFD
exception, any #NM's with a clear IA32_XFD_ERR are from "legacy"
CR0.TS=1. Any bits set in IA32_XFD_ERR mean a new-style XFD exception.
Am I missing something?
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next prev parent reply other threads:[~2020-08-03 17:34 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-13 23:47 [PATCH v6 00/12] x86: tag application address space for devices Fenghua Yu
2020-07-13 23:47 ` [PATCH v6 01/12] iommu: Change type of pasid to u32 Fenghua Yu
2020-07-14 2:45 ` Liu, Yi L
2020-07-14 13:54 ` Fenghua Yu
2020-07-14 13:56 ` Liu, Yi L
2020-07-22 14:03 ` Joerg Roedel
2020-07-22 17:21 ` Fenghua Yu
2020-07-13 23:47 ` [PATCH v6 02/12] iommu/vt-d: Change flags type to unsigned int in binding mm Fenghua Yu
2020-07-13 23:47 ` [PATCH v6 03/12] docs: x86: Add documentation for SVA (Shared Virtual Addressing) Fenghua Yu
2020-07-14 3:25 ` Liu, Yi L
2020-07-15 23:32 ` Fenghua Yu
2020-07-13 23:47 ` [PATCH v6 04/12] x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions Fenghua Yu
2020-07-13 23:48 ` [PATCH v6 05/12] x86/fpu/xstate: Add supervisor PASID state for ENQCMD feature Fenghua Yu
2020-07-13 23:48 ` [PATCH v6 06/12] x86/msr-index: Define IA32_PASID MSR Fenghua Yu
2020-07-13 23:48 ` [PATCH v6 07/12] mm: Define pasid in mm Fenghua Yu
2020-07-13 23:48 ` [PATCH v6 08/12] fork: Clear PASID for new mm Fenghua Yu
2021-02-24 10:19 ` Jean-Philippe Brucker
2021-02-25 22:17 ` Fenghua Yu
2021-03-01 23:00 ` Jacob Pan
2021-03-02 10:43 ` Jean-Philippe Brucker
2020-07-13 23:48 ` [PATCH v6 09/12] x86/process: Clear PASID state for a newly forked/cloned thread Fenghua Yu
2020-08-01 1:44 ` Andy Lutomirski
2020-07-13 23:48 ` [PATCH v6 10/12] x86/mmu: Allocate/free PASID Fenghua Yu
2020-07-13 23:48 ` [PATCH v6 11/12] sched: Define and initialize a flag to identify valid PASID in the task Fenghua Yu
2020-07-13 23:48 ` [PATCH v6 12/12] x86/traps: Fix up invalid PASID Fenghua Yu
2020-07-31 23:34 ` Andy Lutomirski
2020-08-01 0:42 ` Fenghua Yu
2020-08-03 15:03 ` Dave Hansen
2020-08-03 15:12 ` Andy Lutomirski
2020-08-03 15:19 ` Raj, Ashok
2020-08-03 16:36 ` Dave Hansen
2020-08-03 17:16 ` Andy Lutomirski
2020-08-03 17:34 ` Dave Hansen [this message]
2020-08-03 19:24 ` Andy Lutomirski
2020-08-01 1:28 ` Andy Lutomirski
2020-08-03 17:19 ` Fenghua Yu
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