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From: Robin Murphy <robin.murphy@arm.com>
To: Will Deacon <will@kernel.org>, iommu@lists.linux-foundation.org
Cc: Jean-Philippe Brucker <jean-philippe@linaro.org>
Subject: Re: [PATCH 3/4] iommu/arm-smmu-v3: Fix ATC invalidation ordering wrt main TLBs
Date: Tue, 20 Aug 2019 17:50:06 +0100
Message-ID: <983be1bc-1b51-77e7-5aee-8395a4f3724e@arm.com> (raw)
In-Reply-To: <20190820154549.17018-4-will@kernel.org>

On 20/08/2019 16:45, Will Deacon wrote:
> When invalidating the ATC for an PCIe endpoint using ATS, we must take
> care to complete invalidation of the main SMMU TLBs beforehand, otherwise
> the device could immediately repopulate its ATC with stale translations.
> 
> Hooking the ATC invalidation into ->unmap() as we currently do does the
> exact opposite: it ensures that the ATC is invalidated *before*  the
> main TLBs, which is bogus.
> 
> Move ATC invalidation into the actual (leaf) invalidation routines so
> that it is always called after completing main TLB invalidation.
> 
> Signed-off-by: Will Deacon <will@kernel.org>
> ---
>   drivers/iommu/arm-smmu-v3.c | 12 +++++-------
>   1 file changed, 5 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index 9096eca0c480..183a1c121179 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -1961,6 +1961,7 @@ static void arm_smmu_tlb_inv_context(void *cookie)
>   	 */
>   	arm_smmu_cmdq_issue_cmd(smmu, &cmd);
>   	arm_smmu_cmdq_issue_sync(smmu);
> +	arm_smmu_atc_inv_domain(smmu_domain, 0, 0, 0);
>   }
>   
>   static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
> @@ -1969,7 +1970,7 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
>   {
>   	u64 cmds[CMDQ_BATCH_ENTRIES * CMDQ_ENT_DWORDS];
>   	struct arm_smmu_device *smmu = smmu_domain->smmu;
> -	unsigned long end = iova + size;
> +	unsigned long start = iova, end = iova + size;
>   	int i = 0;
>   	struct arm_smmu_cmdq_ent cmd = {
>   		.tlbi = {
> @@ -1998,6 +1999,8 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
>   	}
>   
>   	arm_smmu_cmdq_issue_cmdlist(smmu, cmds, i, true);
> +	if (leaf)
> +		arm_smmu_atc_inv_domain(smmu_domain, 0, start, size);

I still need to get up to speed on your cmdlist and unmap changes, but 
in isolation this "if (leaf)" guard looks a bit dodgy - in the case 
where io-pgtable goes to unmap a 2MB block, finds it's mapped as a 
table, and blows it away in one go, we'll only see a non-leaf TLBI call 
for that range, no?

Tangentially, does arm_smmu_atc_inv_domain() really need to sync once 
for each individual master, or could that do better as well? Not 
something we should worry about right now, but now that I'm looking I 
may as well note it for the record.

Robin.

>   }
>   
>   static void arm_smmu_tlb_inv_page_nosync(struct iommu_iotlb_gather *gather,
> @@ -2416,18 +2419,13 @@ static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova,
>   static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,
>   			     size_t size, struct iommu_iotlb_gather *gather)
>   {
> -	int ret;
>   	struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
>   	struct io_pgtable_ops *ops = smmu_domain->pgtbl_ops;
>   
>   	if (!ops)
>   		return 0;
>   
> -	ret = ops->unmap(ops, iova, size, gather);
> -	if (ret && arm_smmu_atc_inv_domain(smmu_domain, 0, iova, size))
> -		return 0;
> -
> -	return ret;
> +	return ops->unmap(ops, iova, size, gather);
>   }
>   
>   static void arm_smmu_flush_iotlb_all(struct iommu_domain *domain)
> 
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Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-20 15:45 [PATCH 0/4] Sort out SMMUv3 ATC invalidation and locking Will Deacon
2019-08-20 15:45 ` [PATCH 1/4] iommu/arm-smmu-v3: Document ordering guarantees of command insertion Will Deacon
2019-08-20 15:45 ` [PATCH 2/4] iommu/arm-smmu-v3: Rework enabling/disabling of ATS for PCI masters Will Deacon
2019-08-20 16:12   ` Robin Murphy
2019-08-20 16:31     ` Will Deacon
2019-08-20 15:45 ` [PATCH 3/4] iommu/arm-smmu-v3: Fix ATC invalidation ordering wrt main TLBs Will Deacon
2019-08-20 16:50   ` Robin Murphy [this message]
2019-08-20 17:07     ` Will Deacon
2019-08-20 15:45 ` [PATCH 4/4] iommu/arm-smmu-v3: Avoid locking on invalidation path when not using ATS Will Deacon

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