From: zhangfei <zhangfei.gao@linaro.org>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: jean-philippe <jean-philippe@linaro.org>,
Dave Jiang <dave.jiang@intel.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
Arnd Bergmann <arnd@arndb.de>,
francois.ozog@linaro.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
ilias.apalodimas@linaro.org, iommu@lists.linux-foundation.org,
linux-kernel@vger.kernel.org, Jerome Glisse <jglisse@redhat.com>,
grant.likely@arm.com,
"haojian . zhuang" <haojian.zhuang@linaro.org>,
linux-accelerators@lists.ozlabs.org,
linux-crypto@vger.kernel.org, guodong.xu@linaro.org,
kenneth-lee-2012@foxmail.com
Subject: Re: [PATCH v10 0/4] Add uacce module for Accelerator
Date: Fri, 10 Jan 2020 15:03:25 +0800 [thread overview]
Message-ID: <9b87edca-dd4e-3fe2-5acd-11f7381593ed@linaro.org> (raw)
In-Reply-To: <20200109174952.000051e1@Huawei.com>
On 2020/1/10 上午1:49, Jonathan Cameron wrote:
> On Mon, 16 Dec 2019 11:08:13 +0800
> Zhangfei Gao <zhangfei.gao@linaro.org> wrote:
>
>> Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
>> provide Shared Virtual Addressing (SVA) between accelerators and processes.
>> So accelerator can access any data structure of the main cpu.
>> This differs from the data sharing between cpu and io device, which share
>> data content rather than address.
>> Because of unified address, hardware and user space of process can share
>> the same virtual address in the communication.
>>
>> Uacce is intended to be used with Jean Philippe Brucker's SVA
>> patchset[1], which enables IO side page fault and PASID support.
>> We have keep verifying with Jean's sva patchset [2]
>> We also keep verifying with Eric's SMMUv3 Nested Stage patches [3]
> Hi Zhangfei Gao,
>
> Just to check my understanding...
>
> This patch set is not dependent on either 2 or 3?
>
> To use it on our hardware, we need 2, but the interfaces used are already
> upstream, so this could move forwards in parallel.
>
>
Yes,
patch 1, 2 is for uacce.
patch 3, 4 is an example using uacce, which happen to be crypto.
Thanks
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next prev parent reply other threads:[~2020-01-10 7:03 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-16 3:08 [PATCH v10 0/4] Add uacce module for Accelerator Zhangfei Gao
2019-12-16 3:08 ` [PATCH v10 1/4] uacce: Add documents for uacce Zhangfei Gao
2019-12-16 3:08 ` [PATCH v10 2/4] uacce: add uacce driver Zhangfei Gao
2020-01-09 17:38 ` Jonathan Cameron
2020-01-10 6:55 ` zhangfei.gao
2020-01-10 10:10 ` Jonathan Cameron
2020-01-10 14:50 ` zhangfei.gao
2019-12-16 3:08 ` [PATCH v10 3/4] crypto: hisilicon - Remove module_param uacce_mode Zhangfei Gao
2020-01-09 17:40 ` Jonathan Cameron
2019-12-16 3:08 ` [PATCH v10 4/4] crypto: hisilicon - register zip engine to uacce Zhangfei Gao
2020-01-09 17:48 ` Jonathan Cameron
2020-01-10 7:07 ` zhangfei
2019-12-23 13:41 ` [PATCH v10 0/4] Add uacce module for Accelerator zhangfei
2020-01-08 16:47 ` Dave Jiang
2020-01-09 17:49 ` Jonathan Cameron
2020-01-10 7:03 ` zhangfei [this message]
2020-01-10 10:08 ` Jonathan Cameron
2020-01-10 11:29 ` zhangfei.gao
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