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b=fFQJx0L9LVajnSRDPZ3VLLZ7eS/rzw/3gNmqv5DwgGww9Raq8fHHn0HtV26uuFRNy Ww+d2bxibOutbAgmY7NaJJ8UGrlVIVpWhrch5t7b4G+ix1IBNOYuIBmzh0mpLORNKm 1IVDl2j8xxoZKxPAbJIkzMu8r8xZ2XoRgA8NjGkSxsQE+7ibouxUqJRxqgaHWgCLtC 74ovanIJe2MLI0MD27dE9kx6oZniKzNkrjGB6UZkcmJzBjPuVbLQapP8CcLp6m2KVW blFafXkg/OhF5sS15PodY5wdy+mvQPQl8gxXXkctWHBS+RrTCLj8k+g3GeyeqU27x7 eT5qivaSpzcaw== Cc: Thierry Reding , Bryan Huntsman , "robin.murphy@arm.com" , "linux-kernel@vger.kernel.org" , "iommu@lists.linux-foundation.org" , Mikko Perttunen , Timo Alho , Sachin Nikam , Nicolin Chen , "linux-tegra@vger.kernel.org" , Yu-Huan Hsu , Pritesh Raithatha , "will@kernel.org" , "linux-arm-kernel@lists.infradead.org" , Bitan Biswas X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" >Should NVIDIA_TEGRA194_SMMU be a separate value for smmu->model, perhaps? That way we avoid this somewhat odd check here. NVIDIA haven't made any changes to arm,mmu-500. It is only used in different topology. New model would be mis-leading here. As suggested by Robin, It can just be moved to end of function. >> diff --git a/drivers/iommu/arm-smmu-nvidia.c >> b/drivers/iommu/arm-smmu-nvidia.c >I wonder if it would be better to name this arm-smmu-tegra.c to make it clearer that this is for a Tegra chip. We do have regular expressions in MAINTAINERS that catch anything with "tegra" in it to make this easier. >Also, the nsmmu_ prefix looks somewhat odd here. You already use struct nvidia_smmu as the name of the structure, so why not be consistent and continue to use nvidia_smmu_ as the prefix for function names? >Or perhaps even use tegra_smmu_ as the prefix to match the filename change I suggested earlier. Prefix can be updated to nvidia_smmu as we seem to be okay for now to keep file name as arm-smmu-nvidia.c after the vendor name. >> +#define TLB_LOOP_TIMEOUT 1000000 /* 1s! */ >USEC_PER_SEC? It is not meant for a conversion. Reused Timeout variable from arm-smmu.c for tlb_sync implementation. Can rename it to TLB_LOOP_TIMEOUT_IN_US. >> + } >> + dev_err_ratelimited(smmu->dev, >> + "TLB sync timed out -- SMMU may be deadlocked\n"); >Same here. >Also, is there anything we can do when this happens? This is never expected to happen on Silicon. This code and message is reused from arm-smmu.c. >> +#define nsmmu_page(smmu, inst, page) \ >> + (((inst) ? to_nvidia_smmu(smmu)->bases[(inst)] : smmu->base) + \ >> + ((page) << smmu->pgshift)) >Can we simply define to_nvidia_smmu(smmu)->bases[0] = smmu->base in nvidia_smmu_impl_init()? Then this would become just: > to_nvidia_smmu(smmu)->bases[inst] + ((page) << (smmu)->pgshift) > + >Maybe add this here to simplify the nsmmu_page() macro above: > nsmmu->bases[0] = smmu->base; This preferred to avoid the check in nsmmu_page(). But, smmu->base is not yet populated when nvidia_smmu_impl_init() is called. Let me look at the alternative place to set it. -KR _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu