iommu.lists.linux-foundation.org archive mirror
 help / color / mirror / Atom feed
From: Krishna Reddy <vdumpa@nvidia.com>
To: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Sachin Nikam <Snikam@nvidia.com>,
	"nicoleotsuka@gmail.com" <nicoleotsuka@gmail.com>,
	Mikko Perttunen <mperttunen@nvidia.com>,
	Bryan Huntsman <bhuntsman@nvidia.com>,
	"will@kernel.org" <will@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Pritesh Raithatha <praithatha@nvidia.com>,
	Timo Alho <talho@nvidia.com>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	Nicolin Chen <nicolinc@nvidia.com>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	Yu-Huan Hsu <YHsu@nvidia.com>,
	Thierry Reding <treding@nvidia.com>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Bitan Biswas <bbiswas@nvidia.com>
Subject: RE: [PATCH v8 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage
Date: Tue, 30 Jun 2020 17:16:09 +0000	[thread overview]
Message-ID: <BYAPR12MB2822B43B0218F6E55C97451BB36F0@BYAPR12MB2822.namprd12.prod.outlook.com> (raw)
In-Reply-To: <eb0ffc7e-f41b-d17c-6a90-049335098cd2@nvidia.com>

>OK, well I see what you are saying, but if we intended to support all 3 for Tegra194, then we should ensure all 3 are initialised correctly.

The driver intend to support up to 3 instances. It doesn't really mandate that all three instances be present in same DT node.
Each mmio aperture in "reg" property is an instance here. reg = <inst0_base, size>, <inst1_base, size>, <inst2_base, size>;
The reg can have all three or less and driver just configures based on reg and it works fine.

>It would be better to query the number of SMMUs populated in device-tree and then ensure that all are initialised correctly.

Getting the IORESOURCE_MEM is the way to count the instances driver need to support.  
In a way, It is already querying through IORESOURCE_MEM here. 


-KR

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

  reply	other threads:[~2020-06-30 17:16 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-30  0:10 [PATCH v8 0/3] Nvidia Arm SMMUv2 Implementation Krishna Reddy
2020-06-30  0:10 ` [PATCH v8 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage Krishna Reddy
2020-06-30  0:16   ` Nicolin Chen
2020-06-30  5:54   ` Pritesh Raithatha
2020-06-30  8:19   ` Jon Hunter
2020-06-30 14:53     ` Robin Murphy
2020-06-30 15:17       ` Jon Hunter
2020-07-01 18:18       ` Krishna Reddy
2020-07-01 18:56         ` Robin Murphy
2020-07-01 19:12           ` Krishna Reddy
2020-06-30 17:04     ` Krishna Reddy
2020-06-30 10:17   ` Jon Hunter
2020-06-30 16:23     ` Krishna Reddy
2020-06-30 16:32       ` Jon Hunter
2020-06-30 16:44         ` Jon Hunter
2020-06-30 17:16           ` Krishna Reddy [this message]
2020-06-30 19:03             ` Jon Hunter
2020-06-30 20:21               ` Krishna Reddy
2020-06-30  0:10 ` [PATCH v8 2/3] dt-bindings: arm-smmu: Add binding for Tegra194 SMMU Krishna Reddy
2020-06-30  6:01   ` Pritesh Raithatha
2020-06-30  8:21   ` Jon Hunter
2020-06-30 12:27   ` Robin Murphy
2020-07-01 18:28     ` Krishna Reddy
2020-07-01 18:47       ` Jon Hunter
2020-07-01 19:00         ` Krishna Reddy
2020-07-01 19:31           ` Jon Hunter
2020-07-01 19:39             ` Krishna Reddy
2020-07-02 16:05               ` Robin Murphy
2020-07-01 19:03         ` Robin Murphy
2020-06-30  0:10 ` [PATCH v8 3/3] iommu/arm-smmu: Add global/context fault implementation hooks Krishna Reddy
2020-06-30  0:19   ` Nicolin Chen
2020-06-30  5:58   ` Pritesh Raithatha
2020-06-30  8:37   ` Jon Hunter
2020-06-30 12:13     ` Robin Murphy
2020-06-30 12:42       ` Jon Hunter
2020-07-01 18:48       ` Krishna Reddy
2020-07-01 19:14         ` Robin Murphy
2020-07-01 19:22           ` Krishna Reddy

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=BYAPR12MB2822B43B0218F6E55C97451BB36F0@BYAPR12MB2822.namprd12.prod.outlook.com \
    --to=vdumpa@nvidia.com \
    --cc=Snikam@nvidia.com \
    --cc=YHsu@nvidia.com \
    --cc=bbiswas@nvidia.com \
    --cc=bhuntsman@nvidia.com \
    --cc=iommu@lists.linux-foundation.org \
    --cc=jonathanh@nvidia.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mperttunen@nvidia.com \
    --cc=nicoleotsuka@gmail.com \
    --cc=nicolinc@nvidia.com \
    --cc=praithatha@nvidia.com \
    --cc=robin.murphy@arm.com \
    --cc=talho@nvidia.com \
    --cc=treding@nvidia.com \
    --cc=will@kernel.org \
    --subject='RE: [PATCH v8 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).