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b=LzgCldV1XFk449rQei2608bSZKcTjXYqyFgLNfVNU0BzPLHN6oDC/5I6jpAaaUwLv Q0DBojr0SyQ57ao7XyQQ4lyNLXJgm6sigF27DhQDxht2UbCB0kr9rqQKzL9E6zVQOr V9mGrmD1vtQDPTMj4z6dSq9xeBatF2A+Ma3VwAknp3ZDBvJeAW1b1RIOU7nZvceVSX 9NhI97FW6jwWr13+u0pnp/u2uBD0DAZs7DpClymfUjgcYNIbroAkVdWP4y5MP2jtpv o7Mj72BJb7AD2OSZYNJFVK+joLvlRgZ+SEU4pb6w21UJFw9IM5TlJNfPlgD/A5f8+X rp4HSkFd8jXig== Cc: Sachin Nikam , "nicoleotsuka@gmail.com" , Mikko Perttunen , Bryan Huntsman , "linux-kernel@vger.kernel.org" , Pritesh Raithatha , Timo Alho , "iommu@lists.linux-foundation.org" , Nicolin Chen , "linux-tegra@vger.kernel.org" , Yu-Huan Hsu , Thierry Reding , "will@kernel.org" , "linux-arm-kernel@lists.infradead.org" , Bitan Biswas X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On 01/07/2020 20:00, Krishna Reddy wrote: >>>>>> + items: >>>>>> + - enum: >>>>>> + - nvdia,tegra194-smmu >>>>>> + - const: arm,mmu-500 >>>> >>>>> Is the fallback compatible appropriate here? If software treats this as a standard MMU-500 it will only program the first instance (because the second isn't presented as a separate MMU-500) - is there any way that isn't going to blow up? >>>> >>>> When compatible is set to both nvidia,tegra194-smmu and arm,mmu-500, implementation override ensure that both instances are programmed. Isn't it? I am not sure I follow your comment fully. >> >>> The problem is, if for some reason someone had a Tegra194, but only set the compatible string to 'arm,mmu-500' it would assume that it was a normal arm,mmu-500 and only one instance would be programmed. We always want at least 2 of the 3 instances >>programmed and so we should only match 'nvidia,tegra194-smmu'. In fact, I think that we also need to update the arm_smmu_of_match table to add 'nvidia,tegra194-smmu' with the data set to &arm_mmu500. >> >> In that case, new binding "nvidia,smmu-v2" can be added with data set to &arm_mmu500 and enumeration would have nvidia,tegra194-smmu and another variant for next generation SoC in future. >I think you would be better off with nvidia,smmu-500 as smmu-v2 appears to be something different. I see others have a smmu-v2 but I am not sure if that is legacy. We have an smmu-500 and so that would seem more appropriate. I tried to use the binding synonymous to other vendors. V2 is the architecture version. MMU-500 is the actual implementation from ARM based on V2 arch. As we just use the MMU-500 IP as it is, It can be named as nvidia,smmu-500 or similar as well. Others probably having their own implementation based on V2 arch. KR -- nvpublic _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu