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[209.85.166.45]) by smtp.gmail.com with ESMTPSA id z16sm4492998iol.64.2019.09.18.08.32.52 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 18 Sep 2019 08:32:52 -0700 (PDT) Received: by mail-io1-f45.google.com with SMTP id b19so221614iob.4 for ; Wed, 18 Sep 2019 08:32:52 -0700 (PDT) X-Received: by 2002:a6b:b704:: with SMTP id h4mr4680779iof.218.1568820772456; Wed, 18 Sep 2019 08:32:52 -0700 (PDT) MIME-Version: 1.0 References: <4febe7a87a95ed607b4dc68ba96b15210df84e9e.1568731534.git.robin.murphy@arm.com> In-Reply-To: <4febe7a87a95ed607b4dc68ba96b15210df84e9e.1568731534.git.robin.murphy@arm.com> From: Doug Anderson Date: Wed, 18 Sep 2019 08:32:40 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2] iommu/arm-smmu: Report USF more clearly To: Robin Murphy Cc: Will Deacon , "list@263.net:IOMMU DRIVERS , Joerg Roedel , " , Linux ARM X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: iommu-bounces@lists.linux-foundation.org Errors-To: iommu-bounces@lists.linux-foundation.org Hi, On Tue, Sep 17, 2019 at 7:45 AM Robin Murphy wrote: > > Although CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT is a welcome tool > for smoking out inadequate firmware, the failure mode is non-obvious > and can be confusing for end users. Add some special-case reporting of > Unidentified Stream Faults to help clarify this particular symptom. > Since we're adding yet another print to the mix, also break out an > explicit ratelimit state to make sure everything stays together (and > reduce the static storage footprint a little). > > CC: Douglas Anderson nit: Cc, not CC. > Signed-off-by: Robin Murphy > --- > drivers/iommu/arm-smmu.c | 21 ++++++++++++++++----- > drivers/iommu/arm-smmu.h | 2 ++ > 2 files changed, 18 insertions(+), 5 deletions(-) > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index b7cf24402a94..b27020fd6c90 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -36,6 +36,7 @@ > #include > #include > #include > +#include > #include > > #include > @@ -485,6 +486,8 @@ static irqreturn_t arm_smmu_global_fault(int irq, void *dev) > { > u32 gfsr, gfsynr0, gfsynr1, gfsynr2; > struct arm_smmu_device *smmu = dev; > + static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, > + DEFAULT_RATELIMIT_BURST); > > gfsr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR); > gfsynr0 = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSYNR0); > @@ -494,11 +497,19 @@ static irqreturn_t arm_smmu_global_fault(int irq, void *dev) > if (!gfsr) > return IRQ_NONE; > > - dev_err_ratelimited(smmu->dev, > - "Unexpected global fault, this could be serious\n"); > - dev_err_ratelimited(smmu->dev, > - "\tGFSR 0x%08x, GFSYNR0 0x%08x, GFSYNR1 0x%08x, GFSYNR2 0x%08x\n", > - gfsr, gfsynr0, gfsynr1, gfsynr2); > + if (__ratelimit(&rs)) { > + if (IS_ENABLED(CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT) && > + (gfsr & sGFSR_USF)) > + dev_err(smmu->dev, > + "Blocked unknown Stream ID 0x%hx; boot with \"arm-smmu.disable_bypass=0\" to allow, but this may have security implications\n", optional nit: "%#hx" instead of "0x%hx" Reviewed-by: Douglas Anderson _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu