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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Wed, Dec 4, 2019 at 7:56 AM Robin Murphy wrote: > > On 22/11/2019 11:31 pm, Jordan Crouse wrote: > > Add a compatible string to identify SMMUs that are attached > > to Adreno GPU devices that wish to support split pagetables. > > A software policy decision is not, in itself, a good justification for a > DT property. Is the GPU SMMU fundamentally different in hardware* from > the other SMMU(s) in any given SoC? The GPU CP has some sort of mechanism to switch pagetables.. although I guess under the firmware it is all the same. Jordan should know better.. BR, -R > (* where "hardware" may encompass hypervisor shenanigans) > > > Signed-off-by: Jordan Crouse > > --- > > > > Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > index 6515dbe..db9f826 100644 > > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > > @@ -31,6 +31,12 @@ properties: > > - qcom,sdm845-smmu-v2 > > - const: qcom,smmu-v2 > > > > + - description: Qcom Adreno GPU SMMU iplementing split pagetables > > + items: > > + - enum: > > + - qcom,adreno-smmu-v2 > > + - const: qcom,smmu-v2 > > Given that we already have per-SoC compatibles for Qcom SMMUs in > general, this seems suspiciously vague. > > Robin. > > > + > > - description: Qcom SoCs implementing "arm,mmu-500" > > items: > > - enum: > > > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu