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dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=vivek.gautam@codeaurora.org Received: by mail-ed1-f48.google.com with SMTP id h13so3308915edq.10 for ; Sun, 11 Aug 2019 09:08:37 -0700 (PDT) X-Gm-Message-State: APjAAAXeOEheDR7n4G4R2PZuKUwMA0iGRWiFo3IrTOL9xxRFD7gUuqSx OVrHZ35cSLPdBryvR5uTIjfBg7O4D336jeVfZDY= X-Google-Smtp-Source: APXvYqyFFJCaGAq46SyTCzjuDhcbBv3wmxf8bN+ADhcvIt95E7RRnkwHNH6sBTe8oSgzL5kbHeNmbVUaK3aBr0qGTKk= X-Received: by 2002:a17:906:2544:: with SMTP id j4mr27620572ejb.221.1565539715693; Sun, 11 Aug 2019 09:08:35 -0700 (PDT) MIME-Version: 1.0 References: <20190612071554.13573-1-vivek.gautam@codeaurora.org> <20190612071554.13573-5-vivek.gautam@codeaurora.org> <20190805222627.GA2634@builder> In-Reply-To: <20190805222627.GA2634@builder> From: Vivek Gautam Date: Sun, 11 Aug 2019 21:38:24 +0530 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 4/4] arm64: dts/sdm845: Enable FW implemented safe sequence handler on MTP To: Bjorn Andersson Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-arm-msm , Will Deacon , open list , David Brown , "list@263.net:IOMMU DRIVERS , Joerg Roedel , " , robh+dt , Andy Gross , Robin Murphy X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: iommu-bounces@lists.linux-foundation.org Errors-To: iommu-bounces@lists.linux-foundation.org On Tue, Aug 6, 2019 at 3:56 AM Bjorn Andersson wrote: > > On Wed 12 Jun 00:15 PDT 2019, Vivek Gautam wrote: > > > Indicate on MTP SDM845 that firmware implements handler to > > TLB invalidate erratum SCM call where SAFE sequence is toggled > > to achieve optimum performance on real-time clients, such as > > display and camera. > > > > Signed-off-by: Vivek Gautam > > --- > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > > index 78ec373a2b18..6a73d9744a71 100644 > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > > @@ -2368,6 +2368,7 @@ > > compatible = "qcom,sdm845-smmu-500", "arm,mmu-500"; > > reg = <0 0x15000000 0 0x80000>; > > #iommu-cells = <2>; > > + qcom,smmu-500-fw-impl-safe-errata; > > Looked back at this series and started to wonder if there there is a > case where this should not be set? I mean we're after all adding this to > the top 845 dtsi... My bad. This is not valid in case of cheza. Cheza firmware doesn't implement the safe errata handling hook. On cheza we just have the liberty of accessing the secure registers through scm calls - this is what we were doing in earlier patch series handling this errata. So, a property like this should go to mtp board's dts file. Thanks Vivek > > How about making it the default in the driver and opt out of the errata > once there is a need? > > Regards, > Bjorn > > > #global-interrupts = <1>; > > interrupts = , > > , > > -- > > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > > of Code Aurora Forum, hosted by The Linux Foundation > > > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu