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From: Ard Biesheuvel <ardb@kernel.org>
To: Hanjun Guo <guohanjun@huawei.com>
Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>, Will Deacon <will@kernel.org>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Jeremy Linton <jeremy.linton@arm.com>,
	Linuxarm <linuxarm@huawei.com>,
	ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
	Linux IOMMU <iommu@lists.linux-foundation.org>,
	Rob Herring <robh+dt@kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Sudeep Holla <sudeep.holla@arm.com>, Len Brown <lenb@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Christoph Hellwig <hch@lst.de>,
	"moderated list:BROADCOM BCM2835 ARM ARCHITECTURE"
	<linux-rpi-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 7/8] arm64: mm: Set ZONE_DMA size based on early IORT scan
Date: Fri, 16 Oct 2020 08:54:56 +0200	[thread overview]
Message-ID: <CAMj1kXFzYbr_mYm-zhsio2XV+KGgDBjtgy_NWNYnanyfU-U-Nw@mail.gmail.com> (raw)
In-Reply-To: <35faab1c-5c32-6cd3-0a14-77057dd223f5@huawei.com>

On Fri, 16 Oct 2020 at 08:51, Hanjun Guo <guohanjun@huawei.com> wrote:
>
> On 2020/10/16 2:03, Catalin Marinas wrote:
> > On Thu, Oct 15, 2020 at 10:26:18PM +0800, Hanjun Guo wrote:
> >> On 2020/10/15 3:12, Nicolas Saenz Julienne wrote:
> >>> From: Ard Biesheuvel <ardb@kernel.org>
> >>>
> >>> We recently introduced a 1 GB sized ZONE_DMA to cater for platforms
> >>> incorporating masters that can address less than 32 bits of DMA, in
> >>> particular the Raspberry Pi 4, which has 4 or 8 GB of DRAM, but has
> >>> peripherals that can only address up to 1 GB (and its PCIe host
> >>> bridge can only access the bottom 3 GB)
> >>>
> >>> Instructing the DMA layer about these limitations is straight-forward,
> >>> even though we had to fix some issues regarding memory limits set in
> >>> the IORT for named components, and regarding the handling of ACPI _DMA
> >>> methods. However, the DMA layer also needs to be able to allocate
> >>> memory that is guaranteed to meet those DMA constraints, for bounce
> >>> buffering as well as allocating the backing for consistent mappings.
> >>>
> >>> This is why the 1 GB ZONE_DMA was introduced recently. Unfortunately,
> >>> it turns out the having a 1 GB ZONE_DMA as well as a ZONE_DMA32 causes
> >>> problems with kdump, and potentially in other places where allocations
> >>> cannot cross zone boundaries. Therefore, we should avoid having two
> >>> separate DMA zones when possible.
> >>>
> >>> So let's do an early scan of the IORT, and only create the ZONE_DMA
> >>> if we encounter any devices that need it. This puts the burden on
> >>> the firmware to describe such limitations in the IORT, which may be
> >>> redundant (and less precise) if _DMA methods are also being provided.
> >>> However, it should be noted that this situation is highly unusual for
> >>> arm64 ACPI machines. Also, the DMA subsystem still gives precedence to
> >>> the _DMA method if implemented, and so we will not lose the ability to
> >>> perform streaming DMA outside the ZONE_DMA if the _DMA method permits
> >>> it.
> >>
> >> Sorry, I'm still a little bit confused. With this patch, if we have
> >> a device which set the right _DMA method (DMA size >= 32), but with the
> >> wrong DMA size in IORT, we still have the ZONE_DMA created which
> >> is actually not needed?
> >
> > With the current kernel, we get a ZONE_DMA already with an arbitrary
> > size of 1GB that matches what RPi4 needs. We are trying to eliminate
> > such unnecessary ZONE_DMA based on some heuristics (well, something that
> > looks "better" than a OEM ID based quirk). Now, if we learn that IORT
> > for platforms in the field is that broken as to describe few bits-wide
> > DMA masks, we may have to go back to the OEM ID quirk.
>
> Some platforms using 0 as the memory size limit, for example D05 [0] and
> D06 [1], I think we need to go back to the OEM ID quirk.
>
> For D05/D06, there are multi interrupt controllers named as mbigen,
> mbigen is using the named component to describe the mappings with
> the ITS controller, and mbigen is using 0 as the memory size limit.
>
> Also since the memory size limit for PCI RC was introduced by later
> IORT revision, so firmware people may think it's fine to set that
> as 0 because the system works without it.
>

Hello Hanjun,

The patch only takes the address limit field into account if its value > 0.

Also, before commit 7fb89e1d44cb6aec ("ACPI/IORT: take _DMA methods
into account for named components"), the _DMA method was not taken
into account for named components at all, and only the IORT limit was
used, so I do not anticipate any problems with that.
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  reply	other threads:[~2020-10-16  6:55 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-14 19:12 [PATCH v3 0/8] arm64: Default to 32-bit wide ZONE_DMA Nicolas Saenz Julienne
2020-10-14 19:12 ` [PATCH v3 1/8] arm64: mm: Move reserve_crashkernel() into mem_init() Nicolas Saenz Julienne
2020-10-15  8:40   ` Will Deacon
2020-10-15  8:55     ` Nicolas Saenz Julienne
2020-10-14 19:12 ` [PATCH v3 2/8] arm64: mm: Move zone_dma_bits initialization into zone_sizes_init() Nicolas Saenz Julienne
2020-10-14 19:12 ` [PATCH v3 3/8] of/address: Introduce of_dma_get_max_cpu_address() Nicolas Saenz Julienne
2020-10-14 22:02   ` Rob Herring
2020-10-15  6:56     ` Ard Biesheuvel
2020-10-15  9:16       ` Nicolas Saenz Julienne
2020-10-15  9:18         ` Ard Biesheuvel
2020-10-15  8:54     ` Nicolas Saenz Julienne
2020-10-15  5:42   ` Christoph Hellwig
2020-10-15 10:03     ` Nicolas Saenz Julienne
2020-10-16 13:19     ` Rob Herring
2020-10-14 19:12 ` [PATCH v3 4/8] of: unittest: Add test for of_dma_get_max_cpu_address() Nicolas Saenz Julienne
2020-10-14 22:04   ` Rob Herring
2020-10-15  9:51     ` Nicolas Saenz Julienne
2020-10-14 19:12 ` [PATCH v3 5/8] dma-direct: Turn zone_dma_bits default value into a define Nicolas Saenz Julienne
2020-10-15  5:38   ` Christoph Hellwig
2020-10-15 10:05     ` Nicolas Saenz Julienne
2020-10-14 19:12 ` [PATCH v3 6/8] arm64: mm: Set ZONE_DMA size based on devicetree's dma-ranges Nicolas Saenz Julienne
2020-10-15  5:39   ` Christoph Hellwig
2020-10-15 10:05     ` Nicolas Saenz Julienne
2020-10-14 19:12 ` [PATCH v3 7/8] arm64: mm: Set ZONE_DMA size based on early IORT scan Nicolas Saenz Julienne
2020-10-15 10:31   ` Lorenzo Pieralisi
2020-10-16  6:56     ` Ard Biesheuvel
2020-10-15 14:26   ` Hanjun Guo
2020-10-15 15:15     ` Nicolas Saenz Julienne
2020-10-15 18:03     ` Catalin Marinas
2020-10-16  6:51       ` Hanjun Guo
2020-10-16  6:54         ` Ard Biesheuvel [this message]
2020-10-16  7:27           ` Hanjun Guo
2020-10-16  7:34             ` Hanjun Guo
2020-10-14 19:12 ` [PATCH v3 8/8] mm: Update DMA zones description Nicolas Saenz Julienne
2020-10-15  5:40   ` Christoph Hellwig

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