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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Sat, Jul 11, 2020 at 2:51 PM Yong Wu wrote: > > In the previous SoC, the M4U HW is in the EMI power domain which is > always on. the latest M4U is in the display power domain which may be > turned on/off, thus we have to add pm_runtime interface for it. > > we should enable its power before M4U hw initial. and disable it after HW > initialize. > > When the engine work, the engine always enable the power and clocks for > smi-larb/smi-common, then the M4U's power will always be powered on > automatically via the device link with smi-common. > > Note: we don't enable the M4U power in iommu_map/unmap for tlb flush. > If its power already is on, of course it is ok. if the power is off, > the main tlb will be reset while M4U power on, thus the tlb flush while > m4u power off is unnecessary, just skip it. > > Signed-off-by: Yong Wu > --- > drivers/iommu/mtk_iommu.c | 54 ++++++++++++++++++++++++++++++++++----- > 1 file changed, 47 insertions(+), 7 deletions(-) > ... > for_each_m4u(data) { > + /* skip tlb flush when pm is not active */ > + if (pm_runtime_enabled(data->dev) && > + !pm_runtime_active(data->dev)) > + continue; > + pm_runtime_active(dev) == false implies dev->power.disable_depth == 0, which implies pm_runtime_enabled(dev) == true, so the pm_runtime_enabled(data->dev) can be omitted here. > spin_lock_irqsave(&data->tlb_lock, flags); > writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, > data->base + data->plat_data->inv_sel_reg); > ... _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu