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Tue, 23 Jun 2020 06:43:55 +0000 From: "Liu, Yi L" To: Stefan Hajnoczi Subject: RE: [PATCH v2 14/15] vfio: Document dual stage control Thread-Topic: [PATCH v2 14/15] vfio: Document dual stage control Thread-Index: AQHWP+klJ2WDrhzcJUGl5z7dUgTydqjZcnYAgALkw9CACFCUAIABK3hA Date: Tue, 23 Jun 2020 06:43:54 +0000 Message-ID: References: <1591877734-66527-1-git-send-email-yi.l.liu@intel.com> <1591877734-66527-15-git-send-email-yi.l.liu@intel.com> <20200615094128.GB1491454@stefanha-x1.localdomain> <20200622125114.GC15683@stefanha-x1.localdomain> In-Reply-To: <20200622125114.GC15683@stefanha-x1.localdomain> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.2.0.6 dlp-product: dlpe-windows authentication-results: gmail.com; dkim=none (message not signed) header.d=none;gmail.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.198.147.218] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 7eb49aa1-328b-4a79-10a3-08d81740cca7 x-ms-traffictypediagnostic: DM5PR1101MB2265: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:2449; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" > From: Stefan Hajnoczi > Sent: Monday, June 22, 2020 8:51 PM > > On Wed, Jun 17, 2020 at 06:27:27AM +0000, Liu, Yi L wrote: > > > From: Stefan Hajnoczi > > > Sent: Monday, June 15, 2020 5:41 PM > > > On Thu, Jun 11, 2020 at 05:15:33AM -0700, Liu Yi L wrote: > > > > > > > From: Eric Auger > > > > > > > > The VFIO API was enhanced to support nested stage control: a bunch of > > > > new iotcls and usage guideline. > > > > > > > > Let's document the process to follow to set up nested mode. > > > > > > > > Cc: Kevin Tian > > > > CC: Jacob Pan > > > > Cc: Alex Williamson > > > > Cc: Eric Auger > > > > Cc: Jean-Philippe Brucker > > > > Cc: Joerg Roedel > > > > Cc: Lu Baolu > > > > Signed-off-by: Eric Auger > > > > Signed-off-by: Liu Yi L > > > > --- > > > > v1 -> v2: > > > > *) new in v2, compared with Eric's original version, pasid table bind > > > > and fault reporting is removed as this series doesn't cover them. > > > > Original version from Eric. > > > > https://lkml.org/lkml/2020/3/20/700 > > > > > > > > Documentation/driver-api/vfio.rst | 64 > > > > +++++++++++++++++++++++++++++++++++++++ > > > > 1 file changed, 64 insertions(+) > > > > > > > > diff --git a/Documentation/driver-api/vfio.rst > > > > b/Documentation/driver-api/vfio.rst > > > > index f1a4d3c..06224bd 100644 > > > > --- a/Documentation/driver-api/vfio.rst > > > > +++ b/Documentation/driver-api/vfio.rst > > > > @@ -239,6 +239,70 @@ group and can access them as follows:: > > > > /* Gratuitous device reset and go... */ > > > > ioctl(device, VFIO_DEVICE_RESET); > > > > > > > > +IOMMU Dual Stage Control > > > > +------------------------ > > > > + > > > > +Some IOMMUs support 2 stages/levels of translation. Stage corresponds > > > > +to the ARM terminology while level corresponds to Intel's VTD terminology. > > > > +In the following text we use either without distinction. > > > > + > > > > +This is useful when the guest is exposed with a virtual IOMMU and > > > > +some devices are assigned to the guest through VFIO. Then the guest > > > > +OS can use stage 1 (GIOVA -> GPA or GVA->GPA), while the hypervisor > > > > +uses stage 2 for VM isolation (GPA -> HPA). > > > > + > > > > +Under dual stage translation, the guest gets ownership of the stage 1 > > > > +page tables and also owns stage 1 configuration structures. The > > > > +hypervisor owns the root configuration structure (for security > > > > +reason), including stage 2 configuration. This works as long > > > > +configuration structures and page table > > > > > > s/as long configuration/as long as configuration/ > > > > got it. > > > > > > > > > +format are compatible between the virtual IOMMU and the physical IOMMU. > > > > > > s/format/formats/ > > > > I see. > > > > > > + > > > > +Assuming the HW supports it, this nested mode is selected by choosing > > > > +the VFIO_TYPE1_NESTING_IOMMU type through: > > > > + > > > > + ioctl(container, VFIO_SET_IOMMU, VFIO_TYPE1_NESTING_IOMMU); > > > > + > > > > +This forces the hypervisor to use the stage 2, leaving stage 1 > > > > +available for guest usage. The guest stage 1 format depends on IOMMU > > > > +vendor, and it is the same with the nesting configuration method. > > > > +User space should check the format and configuration method after > > > > +setting nesting type by > > > > +using: > > > > + > > > > + ioctl(container->fd, VFIO_IOMMU_GET_INFO, &nesting_info); > > > > + > > > > +Details can be found in Documentation/userspace-api/iommu.rst. For > > > > +Intel VT-d, each stage 1 page table is bound to host by: > > > > + > > > > + nesting_op->flags = VFIO_IOMMU_NESTING_OP_BIND_PGTBL; > > > > + memcpy(&nesting_op->data, &bind_data, sizeof(bind_data)); > > > > + ioctl(container->fd, VFIO_IOMMU_NESTING_OP, nesting_op); > > > > + > > > > +As mentioned above, guest OS may use stage 1 for GIOVA->GPA or GVA->GPA. > > > > +GVA->GPA page tables are available when PASID (Process Address Space > > > > +GVA->ID) > > > > +is exposed to guest. e.g. guest with PASID-capable devices assigned. > > > > +For such page table binding, the bind_data should include PASID info, > > > > +which is allocated by guest itself or by host. This depends on > > > > +hardware vendor e.g. Intel VT-d requires to allocate PASID from host. > > > > +This requirement is available by VFIO_IOMMU_GET_INFO. User space > > > > +could allocate PASID from host by: > > > > + > > > > + req.flags = VFIO_IOMMU_ALLOC_PASID; > > > > + ioctl(container, VFIO_IOMMU_PASID_REQUEST, &req); > > > > > > It is not clear how the userspace application determines whether PASIDs must be > > > allocated from the host via VFIO_IOMMU_PASID_REQUEST or if the guest itself > can > > > allocate PASIDs. The text mentions VFIO_IOMMU_GET_INFO but what exactly > > > should the userspace application check? > > > > For VT-d, spec 3.0 introduced Virtual Cmd interface for PASID allocation, > > guest request PASID from host if it detects the interface. Application > > should check the IOMMU_NESTING_FEAT_SYSWIDE_PASID setting in the below > > info reported by VFIO_IOMMU_GET_INFO. And virtual VT-d should not report > > SVA related capabilities to guest if SYSWIDE_PASID is not supported by > > kernel. > > > > +struct iommu_nesting_info { > > + __u32 size; > > + __u32 format; > > + __u32 features; > > +#define IOMMU_NESTING_FEAT_SYSWIDE_PASID (1 << 0) > > +#define IOMMU_NESTING_FEAT_BIND_PGTBL (1 << 1) > > +#define IOMMU_NESTING_FEAT_CACHE_INVLD (1 << 2) > > + __u32 flags; > > + __u8 data[]; > > +}; > > https://lore.kernel.org/linux-iommu/1591877734-66527-3-git-send-email- > yi.l.liu@intel.com/ > > I see. Is it possible to add this information into this patch or at > least a reference so readers know where to find out exactly how to do > this? oh, yes. this would help a lot. will add it. Regards, Yi Liu > Stefan _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu