From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5F12C38A2B for ; Thu, 16 Apr 2020 13:33:48 +0000 (UTC) Received: from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7C2C8221F7 for ; Thu, 16 Apr 2020 13:33:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7C2C8221F7 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=iommu-bounces@lists.linux-foundation.org Received: from localhost (localhost [127.0.0.1]) by whitealder.osuosl.org (Postfix) with ESMTP id 4A2F78209A; Thu, 16 Apr 2020 13:33:48 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from whitealder.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id yeYUeZMB58pt; Thu, 16 Apr 2020 13:33:46 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [140.211.9.56]) by whitealder.osuosl.org (Postfix) with ESMTP id 4EE4883AF8; Thu, 16 Apr 2020 13:33:46 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id 39956C089E; Thu, 16 Apr 2020 13:33:46 +0000 (UTC) Received: from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138]) by lists.linuxfoundation.org (Postfix) with ESMTP id 4F011C0172 for ; Thu, 16 Apr 2020 13:33:44 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by whitealder.osuosl.org (Postfix) with ESMTP id 46AEA83AF8 for ; Thu, 16 Apr 2020 13:33:44 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from whitealder.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Kzotl+LXB4x7 for ; Thu, 16 Apr 2020 13:33:43 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by whitealder.osuosl.org (Postfix) with ESMTP id F0C0081F27 for ; Thu, 16 Apr 2020 13:33:42 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 544F11FB; Thu, 16 Apr 2020 06:33:42 -0700 (PDT) Received: from [10.57.59.184] (unknown [10.57.59.184]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 243AF3F68F; Thu, 16 Apr 2020 06:33:40 -0700 (PDT) Subject: Re: [PATCH 1/2] iommu: arm-smmu-impl: Convert to a generic reset implementation To: Sai Prakash Ranjan , Will Deacon , Joerg Roedel , Jordan Crouse , Rob Clark References: From: Robin Murphy Message-ID: Date: Thu, 16 Apr 2020 14:33:38 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-GB Cc: Rajendra Nayak , "linux-arm-msm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Stephen Boyd , "iommu@lists.linux-foundation.org" , Matthias Kaehlcke , Bjorn Andersson , "linux-arm-kernel@lists.infradead.org" X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On 2020-01-22 11:48 am, Sai Prakash Ranjan wrote: > Currently the QCOM specific smmu reset implementation is very > specific to SDM845 SoC and has a wait-for-safe logic which > may not be required for other SoCs. So move the SDM845 specific > logic to its specific reset function. Also add SC7180 SMMU > compatible for calling into QCOM specific implementation. > > Signed-off-by: Sai Prakash Ranjan > --- > drivers/iommu/arm-smmu-impl.c | 8 +++++--- > drivers/iommu/arm-smmu-qcom.c | 16 +++++++++++++--- > 2 files changed, 18 insertions(+), 6 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c > index 74d97a886e93..c75b9d957b70 100644 > --- a/drivers/iommu/arm-smmu-impl.c > +++ b/drivers/iommu/arm-smmu-impl.c > @@ -150,6 +150,8 @@ static const struct arm_smmu_impl arm_mmu500_impl = { > > struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) > { > + const struct device_node *np = smmu->dev->of_node; > + > /* > * We will inevitably have to combine model-specific implementation > * quirks with platform-specific integration quirks, but everything > @@ -166,11 +168,11 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) > break; > } > > - if (of_property_read_bool(smmu->dev->of_node, > - "calxeda,smmu-secure-config-access")) > + if (of_property_read_bool(np, "calxeda,smmu-secure-config-access")) > smmu->impl = &calxeda_impl; > > - if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm845-smmu-500")) > + if (of_device_is_compatible(np, "qcom,sdm845-smmu-500") || > + of_device_is_compatible(np, "qcom,sc7180-smmu-500")) > return qcom_smmu_impl_init(smmu); > > return smmu; > diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c > index 24c071c1d8b0..64a4ab270ab7 100644 > --- a/drivers/iommu/arm-smmu-qcom.c > +++ b/drivers/iommu/arm-smmu-qcom.c > @@ -15,8 +15,6 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu) > { > int ret; > > - arm_mmu500_reset(smmu); > - > /* > * To address performance degradation in non-real time clients, > * such as USB and UFS, turn off wait-for-safe on sdm845 based boards, > @@ -30,8 +28,20 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu) > return ret; > } > > +static int qcom_smmu500_reset(struct arm_smmu_device *smmu) > +{ > + const struct device_node *np = smmu->dev->of_node; > + > + arm_mmu500_reset(smmu); > + > + if (of_device_is_compatible(np, "qcom,sdm845-smmu-500")) > + return qcom_sdm845_smmu500_reset(smmu); > + > + return 0; > +} > + > static const struct arm_smmu_impl qcom_smmu_impl = { > - .reset = qcom_sdm845_smmu500_reset, > + .reset = qcom_smmu500_reset, > }; It might be logical to have a separate SDM845 impl rather than indirecting within the callback itself, but I'm not too concerned either way. For the arm-smmu-impl.c changes, Reviewed-by: Robin Murphy Thanks, Robin. > > struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu) > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu