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Kristensen" , Robin Murphy , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Hi Will, On 2020-09-21 23:33, Will Deacon wrote: > On Fri, Sep 11, 2020 at 07:57:18PM +0530, Sai Prakash Ranjan wrote: >> Add a quirk IO_PGTABLE_QUIRK_SYS_CACHE to override the >> attributes set in TCR for the page table walker when >> using system cache. > > I wonder if the panfrost folks can reuse this for the issue discussed > over at: > > https://lore.kernel.org/r/cover.1600213517.git.robin.murphy@arm.com > > However, Sai, your email setup went wrong when you posted this so you > probably need to repost now that you have that fixed. > I have sent a v5 [1] now since I had to drop cleanup of blank lines as Robin said it was intentional and also had to rebase over new gpu changes since it moves pretty fast. [1] https://lore.kernel.org/patchwork/cover/1310000/ Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu