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From: Matthias Brugger <matthias.bgg@gmail.com>
To: Yong Wu <yong.wu@mediatek.com>, Joerg Roedel <joro@8bytes.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Rob Herring <robh+dt@kernel.org>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, Will Deacon <will.deacon@arm.com>,
	linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	Matthias Kaehlcke <mka@chromium.org>,
	linux-mediatek@lists.infradead.org, yingjoe.chen@mediatek.com,
	anan.sun@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 13/21] iommu/mediatek: Add mt8183 IOMMU support
Date: Mon, 17 Jun 2019 17:51:51 +0200
Message-ID: <fa54a1a3-d39a-1235-7cee-3fb10593e5ef@gmail.com> (raw)
In-Reply-To: <1560169080-27134-14-git-send-email-yong.wu@mediatek.com>



On 10/06/2019 14:17, Yong Wu wrote:
> The M4U IP blocks in mt8183 is MediaTek's generation2 M4U which use
> the ARM Short-descriptor like mt8173, and most of the HW registers
> are the same.
> 
> Here list main differences between mt8183 and mt8173/mt2712:
> 1) mt8183 has only one M4U HW like mt8173 while mt2712 has two.
> 2) mt8183 don't have the "bclk" clock, it use the EMI clock instead.
> 3) mt8183 can support the dram over 4GB, but it doesn't call this "4GB
> mode".
> 4) mt8183 pgtable base register(0x0) extend bit[1:0] which represent
> the bit[33:32] in the physical address of the pgtable base, But the
> standard ttbr0[1] means the S bit which is enabled defaultly, Hence,
> we add a mask.
> 5) mt8183 HW has a GALS modules, SMI should enable "has_gals" support.
> 6) mt8183 need reset_axi like mt8173.
> 7) the larb-id in smi-common is remapped. M4U should add its larbid_remap.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> Reviewed-by: Evan Green <evgreen@chromium.org>

Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>

> ---
>  drivers/iommu/mtk_iommu.c | 15 ++++++++++++---
>  drivers/iommu/mtk_iommu.h |  1 +
>  drivers/memory/mtk-smi.c  | 20 ++++++++++++++++++++
>  3 files changed, 33 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index a535dcd..3a14301 100644
> --- a/drivers/iommu/mtk_iommu.c
> +++ b/drivers/iommu/mtk_iommu.c
> @@ -36,6 +36,7 @@
>  #include "mtk_iommu.h"
>  
>  #define REG_MMU_PT_BASE_ADDR			0x000
> +#define MMU_PT_ADDR_MASK			GENMASK(31, 7)
>  
>  #define REG_MMU_INVALIDATE			0x020
>  #define F_ALL_INVLD				0x2
> @@ -341,7 +342,7 @@ static int mtk_iommu_attach_device(struct iommu_domain *domain,
>  	/* Update the pgtable base address register of the M4U HW */
>  	if (!data->m4u_dom) {
>  		data->m4u_dom = dom;
> -		writel(dom->cfg.arm_v7s_cfg.ttbr[0],
> +		writel(dom->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK,
>  		       data->base + REG_MMU_PT_BASE_ADDR);
>  	}
>  
> @@ -715,6 +716,7 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev)
>  {
>  	struct mtk_iommu_data *data = dev_get_drvdata(dev);
>  	struct mtk_iommu_suspend_reg *reg = &data->reg;
> +	struct mtk_iommu_domain *m4u_dom = data->m4u_dom;
>  	void __iomem *base = data->base;
>  	int ret;
>  
> @@ -730,8 +732,8 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev)
>  	writel_relaxed(reg->int_control0, base + REG_MMU_INT_CONTROL0);
>  	writel_relaxed(reg->int_main_control, base + REG_MMU_INT_MAIN_CONTROL);
>  	writel_relaxed(reg->ivrp_paddr, base + REG_MMU_IVRP_PADDR);
> -	if (data->m4u_dom)
> -		writel(data->m4u_dom->cfg.arm_v7s_cfg.ttbr[0],
> +	if (m4u_dom)
> +		writel(m4u_dom->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK,
>  		       base + REG_MMU_PT_BASE_ADDR);
>  	return 0;
>  }
> @@ -756,9 +758,16 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev)
>  	.larbid_remap = {0, 1, 2, 3, 4, 5}, /* Linear mapping. */
>  };
>  
> +static const struct mtk_iommu_plat_data mt8183_data = {
> +	.m4u_plat     = M4U_MT8183,
> +	.reset_axi    = true,
> +	.larbid_remap = {0, 4, 5, 6, 7, 2, 3, 1},
> +};
> +
>  static const struct of_device_id mtk_iommu_of_ids[] = {
>  	{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
>  	{ .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
> +	{ .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
>  	{}
>  };
>  
> diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
> index e5c9dde..c0b5c65 100644
> --- a/drivers/iommu/mtk_iommu.h
> +++ b/drivers/iommu/mtk_iommu.h
> @@ -38,6 +38,7 @@ enum mtk_iommu_plat {
>  	M4U_MT2701,
>  	M4U_MT2712,
>  	M4U_MT8173,
> +	M4U_MT8183,
>  };
>  
>  struct mtk_iommu_plat_data {
> diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
> index 91634d7..a430721 100644
> --- a/drivers/memory/mtk-smi.c
> +++ b/drivers/memory/mtk-smi.c
> @@ -285,6 +285,13 @@ static void mtk_smi_larb_config_port_gen1(struct device *dev)
>  	.larb_direct_to_common_mask = BIT(8) | BIT(9),      /* bdpsys */
>  };
>  
> +static const struct mtk_smi_larb_gen mtk_smi_larb_mt8183 = {
> +	.has_gals                   = true,
> +	.config_port                = mtk_smi_larb_config_port_gen2_general,
> +	.larb_direct_to_common_mask = BIT(2) | BIT(3) | BIT(7),
> +				      /* IPU0 | IPU1 | CCU */
> +};
> +
>  static const struct of_device_id mtk_smi_larb_of_ids[] = {
>  	{
>  		.compatible = "mediatek,mt8173-smi-larb",
> @@ -298,6 +305,10 @@ static void mtk_smi_larb_config_port_gen1(struct device *dev)
>  		.compatible = "mediatek,mt2712-smi-larb",
>  		.data = &mtk_smi_larb_mt2712
>  	},
> +	{
> +		.compatible = "mediatek,mt8183-smi-larb",
> +		.data = &mtk_smi_larb_mt8183
> +	},
>  	{}
>  };
>  
> @@ -391,6 +402,11 @@ static int mtk_smi_larb_remove(struct platform_device *pdev)
>  	.gen = MTK_SMI_GEN2,
>  };
>  
> +static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = {
> +	.gen      = MTK_SMI_GEN2,
> +	.has_gals = true,
> +};
> +
>  static const struct of_device_id mtk_smi_common_of_ids[] = {
>  	{
>  		.compatible = "mediatek,mt8173-smi-common",
> @@ -404,6 +420,10 @@ static int mtk_smi_larb_remove(struct platform_device *pdev)
>  		.compatible = "mediatek,mt2712-smi-common",
>  		.data = &mtk_smi_common_gen2,
>  	},
> +	{
> +		.compatible = "mediatek,mt8183-smi-common",
> +		.data = &mtk_smi_common_mt8183,
> +	},
>  	{}
>  };
>  
> 
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Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-10 12:17 [PATCH v7 00/21] MT8183 IOMMU SUPPORT Yong Wu
2019-06-10 12:17 ` [PATCH v7 01/21] dt-bindings: mediatek: Add binding for mt8183 IOMMU and SMI Yong Wu
2019-06-10 12:17 ` [PATCH v7 02/21] iommu/mediatek: Use a struct as the platform data Yong Wu
2019-06-10 12:17 ` [PATCH v7 03/21] memory: mtk-smi: Use a general config_port interface Yong Wu
2019-06-10 12:17 ` [PATCH v7 04/21] memory: mtk-smi: Use a struct for the platform data for smi-common Yong Wu
2019-06-10 12:17 ` [PATCH v7 05/21] iommu/io-pgtable-arm-v7s: Add paddr_to_iopte and iopte_to_paddr helpers Yong Wu
2019-06-10 12:17 ` [PATCH v7 06/21] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB Mode Yong Wu
2019-06-10 12:17 ` [PATCH v7 07/21] iommu/mediatek: Add bclk can be supported optionally Yong Wu
2019-06-15 19:18   ` Matthias Brugger
2019-06-10 12:17 ` [PATCH v7 08/21] iommu/mediatek: Add larb-id remapped support Yong Wu
2019-06-17  9:25   ` Matthias Brugger
2019-06-10 12:17 ` [PATCH v7 09/21] iommu/mediatek: Refine protect memory definition Yong Wu
2019-06-17  9:59   ` Matthias Brugger
2019-06-10 12:17 ` [PATCH v7 10/21] iommu/mediatek: Move reset_axi into plat_data Yong Wu
2019-06-17 10:19   ` Matthias Brugger
2019-06-10 12:17 ` [PATCH v7 11/21] iommu/mediatek: Move vld_pa_rng " Yong Wu
2019-06-17 10:27   ` Matthias Brugger
2019-06-10 12:17 ` [PATCH v7 12/21] memory: mtk-smi: Add gals support Yong Wu
2019-06-17 15:43   ` Matthias Brugger
2019-06-10 12:17 ` [PATCH v7 13/21] iommu/mediatek: Add mt8183 IOMMU support Yong Wu
2019-06-17 15:51   ` Matthias Brugger [this message]
2019-06-10 12:17 ` [PATCH v7 14/21] iommu/mediatek: Add mmu1 support Yong Wu
2019-06-17 15:58   ` Matthias Brugger
2019-06-18  6:19   ` Tomasz Figa via iommu
2019-06-18 12:09     ` Yong Wu
2019-06-18 14:05       ` Tomasz Figa via iommu
2019-06-10 12:17 ` [PATCH v7 15/21] memory: mtk-smi: Invoke pm runtime_callback to enable clocks Yong Wu
2019-06-17 16:13   ` Matthias Brugger
2019-06-10 12:17 ` [PATCH v7 16/21] memory: mtk-smi: Add bus_sel for mt8183 Yong Wu
2019-06-13  8:14   ` Pi-Hsun Shih
2019-06-20  9:35     ` Matthias Brugger
2019-06-20 11:38       ` Matthias Brugger
2019-06-21  3:57         ` Pi-Hsun Shih
2019-06-13  8:20   ` Pi-Hsun Shih
2019-06-17 16:28     ` Matthias Brugger
2019-06-17 16:23   ` Matthias Brugger
2019-06-18 12:10     ` Yong Wu
2019-06-18 21:07       ` Matthias Brugger
2019-06-10 12:17 ` [PATCH v7 17/21] memory: mtk-smi: Get rid of need_larbid Yong Wu
2019-06-18 13:45   ` Matthias Brugger
2019-06-20 13:59     ` Yong Wu
2019-06-10 12:17 ` [PATCH v7 18/21] iommu/mediatek: Fix VLD_PA_RNG register backup when suspend Yong Wu
2019-06-17 16:30   ` Matthias Brugger
2019-06-10 12:17 ` [PATCH v7 19/21] iommu/mediatek: Rename enable_4GB to dram_is_4gb Yong Wu
2019-06-18 16:06   ` Matthias Brugger
2019-06-20 13:59     ` Yong Wu
2019-06-21 10:10       ` Matthias Brugger
2019-06-22  2:42         ` Yong Wu
2019-06-10 12:17 ` [PATCH v7 20/21] iommu/mediatek: Fix iova_to_phys PA start for 4GB mode Yong Wu
2019-06-18 16:35   ` Matthias Brugger
2019-06-20 14:00     ` Yong Wu
2019-06-10 12:18 ` [PATCH v7 21/21] iommu/mediatek: Switch to SPDX license identifier Yong Wu
2019-06-17 16:33   ` Matthias Brugger

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