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[149.200.78.10]) by smtp.gmail.com with ESMTPSA id j5sm9091734ejk.87.2020.07.31.05.02.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2020 05:02:20 -0700 (PDT) From: "Saheed O. Bolarinwa" To: helgaas@kernel.org, "David S. Miller" , Kalle Valo , Jakub Kicinski Date: Fri, 31 Jul 2020 13:02:31 +0200 Message-Id: <20200731110240.98326-4-refactormyself@gmail.com> X-Mailer: git-send-email 2.18.4 In-Reply-To: <20200731110240.98326-1-refactormyself@gmail.com> References: <20200731110240.98326-1-refactormyself@gmail.com> Cc: "Saheed O. Bolarinwa" , linux-wireless@vger.kernel.org, linux-kernel@vger.kernel.org, QCA ath9k Development , netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel-mentees@lists.linuxfoundation.org Subject: [Linux-kernel-mentees] [PATCH v4 03/12] ath9k: Check if pcie_capability_read_*() reads ~0 X-BeenThere: linux-kernel-mentees@lists.linuxfoundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: linux-kernel-mentees-bounces@lists.linuxfoundation.org Sender: "Linux-kernel-mentees" On failure pcie_capability_read_dword() sets it's last parameter, val to 0. However, with Patch 12/12, it is possible that val is set to ~0 on failure. This would introduce a bug because (x & x) == (~0 & x). Since ~0 is an invalid value here, Add an extra check for ~0 to the if condition to ensure success. Suggested-by: Bjorn Helgaas Signed-off-by: Saheed O. Bolarinwa --- drivers/net/wireless/ath/ath9k/pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c index f3461b193c7a..f02b243befef 100644 --- a/drivers/net/wireless/ath/ath9k/pci.c +++ b/drivers/net/wireless/ath/ath9k/pci.c @@ -867,7 +867,8 @@ static void ath_pci_aspm_init(struct ath_common *common) pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix); pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm); - if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) { + if ((aspm != (u16)~0) && + (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1))) { ah->aspm_enabled = true; /* Initialize PCIe PM and SERDES registers. */ ath9k_hw_configpcipowersave(ah, false); -- 2.18.4 _______________________________________________ Linux-kernel-mentees mailing list Linux-kernel-mentees@lists.linuxfoundation.org https://lists.linuxfoundation.org/mailman/listinfo/linux-kernel-mentees