From: "Saheed O. Bolarinwa" <refactormyself@gmail.com>
To: helgaas@kernel.org
Cc: "Saheed O. Bolarinwa" <refactormyself@gmail.com>,
linux-kernel-mentees@lists.linuxfoundation.org
Subject: [Linux-kernel-mentees] [RFC PATCH v5 11/23] PCI: Rework and Rename aspm_calc_l1ss_info()
Date: Sat, 22 Aug 2020 22:03:46 +0200 [thread overview]
Message-ID: <20200822200358.252967-12-refactormyself@gmail.com> (raw)
In-Reply-To: <20200822200358.252967-1-refactormyself@gmail.com>
The value of l1ss_cap_ptr can nw be obtained directly from struct
pci_dev, it is no useful to cache it. So, aspm_calc_l1ss_info()
will only be computing the values of ctl1 and ctl2.
- Rename aspm_calc_l1ss_info() to aspm_calc_l1ss_ctl_values().
- Rework the function to take a pci_dev and values' pointer.
- Remove caching of pdev->l1ss_cap_ptr
- Change calls to aspm_calc_l1ss_info() into new function.
- Access pdev->l1ss_cap_ptr directly
- No more reference to struct pcie_link_state.l1ss, so remove it.
Signed-off-by: Saheed O. Bolarinwa <refactormyself@gmail.com>
---
drivers/pci/pcie/aspm.c | 43 ++++++++++++++---------------------------
1 file changed, 15 insertions(+), 28 deletions(-)
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 89f3f3a6d007..4cff11dc8d83 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -74,14 +74,6 @@ struct pcie_link_state {
* has one slot under it, so at most there are 8 functions.
*/
struct aspm_latency acceptable[8];
-
- /* L1 PM Substate info */
- struct {
- u32 up_cap_ptr; /* L1SS cap ptr in upstream dev */
- u32 dw_cap_ptr; /* L1SS cap ptr in downstream dev */
- u32 ctl1; /* value to be programmed in ctl1 */
- u32 ctl2; /* value to be programmed in ctl2 */
- } l1ss;
};
static int aspm_disabled, aspm_force;
@@ -444,17 +436,15 @@ static struct pci_dev *pci_function_0(struct pci_bus *linkbus)
}
/* Calculate L1.2 PM substate timing parameters */
-static void aspm_calc_l1ss_info(struct pcie_link_state *link)
+static void aspm_calc_l1ss_ctl_values(struct pci_dev *pdev,
+ u32 *ctl1, u32 *ctl2)
{
+ struct pcie_link_state *link = pdev->link_state;
u32 val1, val2, scale1, scale2;
u32 t_common_mode, t_power_on, l1_2_threshold, scale, value;
struct pci_dev *dw_pdev = link->downstream;
struct pci_dev *up_pdev = link->pdev;
- link->l1ss.up_cap_ptr = up_pdev->l1ss_cap_ptr;
- link->l1ss.dw_cap_ptr = dw_pdev->l1ss_cap_ptr;
- link->l1ss.ctl1 = link->l1ss.ctl2 = 0;
-
if (!(link->aspm_support & ASPM_STATE_L1_2_MASK))
return;
@@ -471,10 +461,10 @@ static void aspm_calc_l1ss_info(struct pcie_link_state *link)
if (calc_l1ss_pwron(up_pdev, scale1, val1) >
calc_l1ss_pwron(dw_pdev, scale2, val2)) {
- link->l1ss.ctl2 |= scale1 | (val1 << 3);
+ *ctl2 |= scale1 | (val1 << 3);
t_power_on = calc_l1ss_pwron(up_pdev, scale1, val1);
} else {
- link->l1ss.ctl2 |= scale2 | (val2 << 3);
+ *ctl2 |= scale2 | (val2 << 3);
t_power_on = calc_l1ss_pwron(dw_pdev, scale2, val2);
}
@@ -490,7 +480,7 @@ static void aspm_calc_l1ss_info(struct pcie_link_state *link)
*/
l1_2_threshold = 2 + 4 + t_common_mode + t_power_on;
encode_l12_threshold(l1_2_threshold, &scale, &value);
- link->l1ss.ctl1 |= t_common_mode << 8 | scale << 29 | value << 16;
+ *ctl1 |= t_common_mode << 8 | scale << 29 | value << 16;
}
static u32 get_aspm_enable(struct pci_dev *pdev)
@@ -620,13 +610,13 @@ static void pci_clear_and_set_dword(struct pci_dev *pdev, int pos,
/* Configure the ASPM L1 substates */
static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state)
{
- u32 val, enable_req;
+ u32 val, enable_req, ctl1, ctl2;
struct pci_dev *child = link->downstream, *parent = link->pdev;
- u32 up_cap_ptr = link->l1ss.up_cap_ptr;
- u32 dw_cap_ptr = link->l1ss.dw_cap_ptr;
+ int up_cap_ptr = parent->l1ss_cap_ptr;
+ int dw_cap_ptr = child->l1ss_cap_ptr;
enable_req = (parent->aspm_enabled ^ state) & state;
- aspm_calc_l1ss_info(link);
+ aspm_calc_l1ss_ctl_values(parent, &ctl1, &ctl2);
/*
* Here are the rules specified in the PCIe spec for enabling L1SS:
@@ -661,24 +651,21 @@ static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state)
/* Program T_POWER_ON times in both ports */
pci_write_config_dword(parent, up_cap_ptr + PCI_L1SS_CTL2,
- link->l1ss.ctl2);
+ ctl2);
pci_write_config_dword(child, dw_cap_ptr + PCI_L1SS_CTL2,
- link->l1ss.ctl2);
+ ctl2);
/* Program Common_Mode_Restore_Time in upstream device */
pci_clear_and_set_dword(parent, up_cap_ptr + PCI_L1SS_CTL1,
- PCI_L1SS_CTL1_CM_RESTORE_TIME,
- link->l1ss.ctl1);
+ PCI_L1SS_CTL1_CM_RESTORE_TIME, ctl1);
/* Program LTR_L1.2_THRESHOLD time in both ports */
pci_clear_and_set_dword(parent, up_cap_ptr + PCI_L1SS_CTL1,
PCI_L1SS_CTL1_LTR_L12_TH_VALUE |
- PCI_L1SS_CTL1_LTR_L12_TH_SCALE,
- link->l1ss.ctl1);
+ PCI_L1SS_CTL1_LTR_L12_TH_SCALE, ctl1);
pci_clear_and_set_dword(child, dw_cap_ptr + PCI_L1SS_CTL1,
PCI_L1SS_CTL1_LTR_L12_TH_VALUE |
- PCI_L1SS_CTL1_LTR_L12_TH_SCALE,
- link->l1ss.ctl1);
+ PCI_L1SS_CTL1_LTR_L12_TH_SCALE, ctl1);
}
val = 0;
--
2.18.4
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next prev parent reply other threads:[~2020-08-22 21:03 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-22 20:03 [Linux-kernel-mentees] [RFC PATCH v5 00/23] Remove struct pcie_link_state and aspm_register_info Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 01/23] PCI: Migrate ASPM info from struct pcie_link_state to struct pci_dev Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 02/23] PCI: Add l1ss_cap and l1ss_cap_ptr " Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 03/23] PCI: Rework calc_l*_latency() to take a pci_dev * Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 04/23] PCI: Compute aspm_register_info.support directly Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 05/23] PCI: Read value of aspm_register_info.l1ss_ctl1 directly Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 06/23] PCI: Replace aspm_register_info.l1ss_cap* with their pci_dev version Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 07/23] PCI: Compute aspm_register_info.enable directly Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 08/23] PCI: Remove unused aspm_calc_l1ss_info() arguments Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 09/23] PCI: Remove pcie_get_aspm_reg() and struct aspm_register_info Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 10/23] PCI: Relocate call to aspm_calc_l1ss_info Saheed O. Bolarinwa
2020-08-22 20:03 ` Saheed O. Bolarinwa [this message]
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 12/23] PCI: Add ASPM and CLOCK PM states to struct pci_dev Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 13/23] PCI: Initialise and Update values of pci_dev's PCIe link info Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 14/23] PCI: Change Return and Argument values from pcie_link_state to pci_dev Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 15/23] PCI: Replace pcie_link_state based device list with a pci_dev one Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 16/23] PCI: Remove Exit latencies from struct pcie_link_state Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 17/23] PCI: Remove .clkpm_* " Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 18/23] PCI: Remove .aspm_* " Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 19/23] PCI: Remove .parent " Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 20/23] PCI: Remove .root " Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 21/23] PCI: Remove .downstream " Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 22/23] PCI: Remove .pdev " Saheed O. Bolarinwa
2020-08-22 20:03 ` [Linux-kernel-mentees] [RFC PATCH v5 23/23] PCI: Remove " Saheed O. Bolarinwa
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