From: Kishon Vijay Abraham I <kishon@ti.com>
To: Rob Herring <robh@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>, Nishanth Menon <nm@ti.com>,
Swapnil Jakhade <sjakhade@cadence.com>,
Peter Rosin <peda@axentia.se>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC
Date: Fri, 8 Jan 2021 16:31:24 +0530 [thread overview]
Message-ID: <0c89f4c7-94f2-2653-f951-3c4191c9f4e5@ti.com> (raw)
In-Reply-To: <20210108030325.GA1794594@robh.at.kernel.org>
Hi Rob,
On 08/01/21 8:33 am, Rob Herring wrote:
> On Thu, Dec 24, 2020 at 05:12:47PM +0530, Kishon Vijay Abraham I wrote:
>> AM64 has a single lane SERDES which can be configured to be used
>> with either PCIe or USB. Define the possilbe values for the SERDES
>> function in AM64 SoC here.
>
> Doesn't look like this is used? Would the common phy modes work?
This will be used when the dts files are added.
Thanks
Kishon
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>> include/dt-bindings/mux/ti-serdes.h | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
>> index 9047ec6bd3cf..68e0f76deed1 100644
>> --- a/include/dt-bindings/mux/ti-serdes.h
>> +++ b/include/dt-bindings/mux/ti-serdes.h
>> @@ -90,4 +90,8 @@
>> #define J7200_SERDES0_LANE3_USB 0x2
>> #define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
>>
>> +/* AM64 */
>> +#define AM64_SERDES0_LANE0_PCIE0 0x0
>> +#define AM64_SERDES0_LANE0_USB 0x1
>> +
>> #endif /* _DT_BINDINGS_MUX_TI_SERDES */
>> --
>> 2.17.1
>>
next prev parent reply other threads:[~2021-01-08 11:02 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-24 11:42 [PATCH 0/7] AM64: Add SERDES bindings and driver support Kishon Vijay Abraham I
2020-12-24 11:42 ` [PATCH 1/7] dt-bindings: phy: ti,phy-j721e-wiz: Add bindings for AM64 SERDES Wrapper Kishon Vijay Abraham I
2021-01-08 2:58 ` Rob Herring
2020-12-24 11:42 ` [PATCH 2/7] dt-bindings: phy: ti,phy-j721e-wiz: Add binding for phy_en_refclk Kishon Vijay Abraham I
2021-01-08 2:59 ` Rob Herring
2020-12-24 11:42 ` [PATCH 3/7] dt-bindings: phy: cadence-torrent: Add binding for refclk driver Kishon Vijay Abraham I
2021-01-08 3:01 ` Rob Herring
2020-12-24 11:42 ` [PATCH 4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC Kishon Vijay Abraham I
2021-01-08 3:03 ` Rob Herring
2021-01-08 11:01 ` Kishon Vijay Abraham I [this message]
2021-01-08 10:46 ` Peter Rosin
2021-01-08 11:03 ` Kishon Vijay Abraham I
2020-12-24 11:42 ` [PATCH 5/7] phy: ti: j721e-wiz: Configure full rate divider for AM64 Kishon Vijay Abraham I
2021-01-13 14:04 ` Vinod Koul
2020-12-24 11:42 ` [PATCH 6/7] phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m> Kishon Vijay Abraham I
2021-01-13 14:12 ` Vinod Koul
2020-12-24 11:42 ` [PATCH 7/7] phy: cadence-torrent: Add support to drive refclk out Kishon Vijay Abraham I
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