From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17A02C4332F for ; Fri, 17 Sep 2021 02:54:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E37F8611EE for ; Fri, 17 Sep 2021 02:54:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242843AbhIQCzw (ORCPT ); Thu, 16 Sep 2021 22:55:52 -0400 Received: from inva021.nxp.com ([92.121.34.21]:45004 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234959AbhIQCzt (ORCPT ); Thu, 16 Sep 2021 22:55:49 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 1B91B2012CD; Fri, 17 Sep 2021 04:54:27 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D7E762012FC; Fri, 17 Sep 2021 04:54:26 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 3CA2A183AC4C; Fri, 17 Sep 2021 10:54:25 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, kishon@ti.com, vkoul@kernel.org, robh@kernel.org, galak@kernel.crashing.org, shawnguo@kernel.org Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Richard Zhu Subject: [PATCH 1/4] dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy Date: Fri, 17 Sep 2021 10:31:00 +0800 Message-Id: <1631845863-24249-2-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1631845863-24249-1-git-send-email-hongxing.zhu@nxp.com> References: <1631845863-24249-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding for reference clock PAD modes of the i.MX8 PCIe PHY. Signed-off-by: Richard Zhu --- include/dt-bindings/phy/phy-imx8-pcie.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 include/dt-bindings/phy/phy-imx8-pcie.h diff --git a/include/dt-bindings/phy/phy-imx8-pcie.h b/include/dt-bindings/phy/phy-imx8-pcie.h new file mode 100644 index 000000000000..fe198a0cc12c --- /dev/null +++ b/include/dt-bindings/phy/phy-imx8-pcie.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for i.MX8 PCIe. + */ + +#ifndef _DT_BINDINGS_IMX8_PCIE_H +#define _DT_BINDINGS_IMX8_PCIE_H + +/* Reference clock PAD mode */ +#define IMX8_PCIE_REFCLK_PAD_NO_USED 0 +#define IMX8_PCIE_REFCLK_PAD_INPUT 1 +#define IMX8_PCIE_REFCLK_PAD_OUTPUT 2 + +#endif /* _DT_BINDINGS_IMX8_PCIE_H */ -- 2.25.1