linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Ahmed S. Darwish" <darwish.07@gmail.com>
To: jgarzik@pobox.com
Cc: linux-kernel@vger.kernel.org
Subject: [PATCH 2.6.20-rc5] intel_rng: substitue magic PCI IDs with macros
Date: Sun, 14 Jan 2007 19:24:21 +0200	[thread overview]
Message-ID: <20070114172421.GA3874@Ahmed> (raw)

Substitue intel_rng magic PCI IDs values used in the IDs table
with the macros defined in pci_ids.h


Signed-off-by: Ahmed S. Darwish <darwish.07@gmail.com>
---

I've used a small script to generate this patch then manually tried to 
make sure it's (hopefully) correct. 

#!/bin/bash

INTEL_RNG_FILE=drivers/char/hw_random/intel-rng.c
TMP_FILE=$(mktemp)
MAGIC_NUMS_FILE=$(mktemp)

# grep the contents of "pci_device_id pci_tbl[]"
grep "{ 0x8086"  drivers/char/hw_random/intel-rng.c > $TMP_FILE
# Extract the magic numbers to be replaced
cat $TMP_FILE | awk ' { print $3 } ' | cut -d, -f1 | grep "0x" > $MAGIC_NUMS_FILE

sed -i "s/0x8086/PCI_VENDOR_ID_INTEL/g" $INTEL_RNG_FILE

# For each magic number in MAGIC_NUMS_FILE, find its defined macro 
# in pci_ids.h then replace them.

for i in $(cat $MAGIC_NUMS_FILE); do 
    var=$(grep "PCI_DEVICE_ID" include/linux/pci_ids.h | grep "$i" | awk ' { print $2 } ')
    if [[ -n "$var" ]] ; then
	# sed: Side effect of replacing the magic number in the whole file
	# Collisions with other magics belonging to another family ?
	# Manual checking reveals no bad collisions happen.
	sed -i "s/${i}/${var}/g" $INTEL_RNG_FILE
    fi
done

rm -f $TMP_FILE
rm -f $MAGIC_NUMS_FILE

diff --git a/drivers/char/hw_random/intel-rng.c b/drivers/char/hw_random/intel-rng.c
index f22e78e..85b0374 100644
--- a/drivers/char/hw_random/intel-rng.c
+++ b/drivers/char/hw_random/intel-rng.c
@@ -95,50 +95,96 @@
  * want to register another driver on the same PCI id.
  */
 static const struct pci_device_id pci_tbl[] = {
-/* AA
-	{ 0x8086, 0x2418, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */
-	{ 0x8086, 0x2410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* AA */
-/* AB
-	{ 0x8086, 0x2428, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */
-	{ 0x8086, 0x2420, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* AB */
-/* ??
-	{ 0x8086, 0x2430, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */
-/* BAM, CAM, DBM, FBM, GxM
-	{ 0x8086, 0x2448, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */
-	{ 0x8086, 0x244c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* BAM */
-	{ 0x8086, 0x248c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CAM */
-	{ 0x8086, 0x24cc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* DBM */
-	{ 0x8086, 0x2641, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* FBM */
-	{ 0x8086, 0x27b9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* GxM */
-	{ 0x8086, 0x27bd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* GxM DH */
-/* BA, CA, DB, Ex, 6300, Fx, 631x/632x, Gx
-	{ 0x8086, 0x244e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */
-	{ 0x8086, 0x2440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* BA */
-	{ 0x8086, 0x2480, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CA */
-	{ 0x8086, 0x24c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* DB */
-	{ 0x8086, 0x24d0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Ex */
-	{ 0x8086, 0x25a1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 6300 */
-	{ 0x8086, 0x2640, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Fx */
-	{ 0x8086, 0x2670, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x2671, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x2672, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x2673, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x2674, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x2675, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x2676, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x2677, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x2678, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x2679, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x267a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x267b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x267c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x267d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x267e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x267f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
-	{ 0x8086, 0x27b8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Gx */
-/* E
-	{ 0x8086, 0x245e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */
-	{ 0x8086, 0x2450, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* E  */
+/* 
+ * AA
+ *	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_8, PCI_ANY_ID, 
+ *	PCI_ANY_ID, 0, 0, 0, }, 
+ */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, PCI_ANY_ID,
+	  PCI_ANY_ID, 0, 0, 0, },
+/* 
+ * AB
+ *	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_8, PCI_ANY_ID, 
+ *	PCI_ANY_ID, 0, 0, 0, }, 
+ */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, },
+/* 
+ * ??
+ *	{ PCI_VENDOR_ID_INTEL, 0x2430, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, 
+ *
+ * BAM, CAM, DBM, FBM, GxM
+ *	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_6, PCI_ANY_ID, 
+ *	PCI_ANY_ID, 0, 0, 0, }, 
+ */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10, PCI_ANY_ID,
+	  PCI_ANY_ID, 0, 0, 0, },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, PCI_ANY_ID,
+	  PCI_ANY_ID, 0, 0, 0, },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, PCI_ANY_ID,
+	  PCI_ANY_ID, 0, 0, 0, },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, }, /* FBM */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, }, /* GxM */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_31, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, }, /* GxM DH */
+/*
+ * BA, CA, DB, Ex, 6300, Fx, 631x/632x, Gx
+ *	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_11, PCI_ANY_ID, 
+ *	PCI_ANY_ID, 0, 0, 0, }, 
+ */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, }, /* Ex */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, }, /* 6300 */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0, PCI_ANY_ID,
+	  PCI_ANY_ID, 0, 0, 0, }, /* Fx */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_0, PCI_ANY_ID,
+	  PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x2671, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	{ PCI_VENDOR_ID_INTEL, 0x2672, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, 
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x2673, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, 
+        /* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x2674, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x2675, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x2676, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x2677, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x2678, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x2679, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x267a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x267b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x267c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x267d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, 
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x267e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, 0x267f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+	/* 631x/632x */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, }, /* Gx */
+/* 
+ * E
+ *	{ PCI_VENDOR_ID_INTEL, 0x245e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, 
+ */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_0, PCI_ANY_ID, 
+	  PCI_ANY_ID, 0, 0, 0, }, /* E  */
 	{ 0, },	/* terminate list */
 };
 MODULE_DEVICE_TABLE(pci, pci_tbl);
@@ -251,7 +297,7 @@ static int __init mod_init(void)
 	}
 
 	/* Check for Intel 82802 */
-	if (dev->device < 0x2640) {
+	if (dev->device < PCI_DEVICE_ID_INTEL_ICH6_0) {
 		fwh_dec_en1_off = FWH_DEC_EN1_REG_OLD;
 		bios_cntl_off = BIOS_CNTL_REG_OLD;
 	} else {

-- 
Ahmed S. Darwish
http://darwish-07.blogspot.com

             reply	other threads:[~2007-01-14 17:24 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-01-14 17:24 Ahmed S. Darwish [this message]
2007-01-14 17:37 ` [PATCH 2.6.20-rc5] intel_rng: substitue magic PCI IDs with macros Arjan van de Ven
2007-01-14 19:31   ` Dave Airlie
2007-01-14 23:07     ` Ahmed S. Darwish
2007-01-15  0:29       ` Greg KH
2007-01-15  7:16   ` Ahmed S. Darwish
2007-01-15 17:50   ` Ahmed S. Darwish
2007-01-15  0:29 ` Greg KH
2007-01-15  9:17   ` Ahmed S. Darwish
2007-01-15 20:38 Ahmed S. Darwish

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20070114172421.GA3874@Ahmed \
    --to=darwish.07@gmail.com \
    --cc=jgarzik@pobox.com \
    --cc=linux-kernel@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).