From: Mario Limonciello <mario.limonciello@amd.com>
To: <tglx@linutronix.de>, <mingo@redhat.com>, <bp@alien8.de>,
<dave.hansen@linux.intel.com>
Cc: <x86@kernel.org>, <hpa@zytor.com>, <linux-kernel@vger.kernel.org>,
<dlazar@gmail.com>, <hdegoede@redhat.com>,
Mario Limonciello <mario.limonciello@amd.com>
Subject: [PATCH 2/2] x86/irq/i8259: Configure null pic to have one legacy IRQ
Date: Thu, 19 Oct 2023 22:38:06 -0500 [thread overview]
Message-ID: <20231020033806.88063-2-mario.limonciello@amd.com> (raw)
In-Reply-To: <20231020033806.88063-1-mario.limonciello@amd.com>
If the system is configured with the NULL PIC, the system should
still be able to set up the timer IRQ at IRQ 0.
Link: https://lore.kernel.org/linux-kernel/878r7z4kb4.ffs@tglx/
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
arch/x86/kernel/i8259.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index 43c1c24e934b..885687e64e4e 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -424,7 +424,7 @@ static int legacy_pic_probe(void)
}
struct legacy_pic null_legacy_pic = {
- .nr_legacy_irqs = 0,
+ .nr_legacy_irqs = 1,
.chip = &dummy_irq_chip,
.mask = legacy_pic_uint_noop,
.unmask = legacy_pic_uint_noop,
--
2.34.1
next prev parent reply other threads:[~2023-10-20 3:38 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-20 3:38 [PATCH 1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs Mario Limonciello
2023-10-20 3:38 ` Mario Limonciello [this message]
2023-10-23 13:26 ` Mario Limonciello
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