From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31BDCC43215 for ; Thu, 21 Nov 2019 09:46:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0A4C6208CC for ; Thu, 21 Nov 2019 09:46:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726765AbfKUJqW (ORCPT ); Thu, 21 Nov 2019 04:46:22 -0500 Received: from mga07.intel.com ([134.134.136.100]:62621 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726541AbfKUJqV (ORCPT ); Thu, 21 Nov 2019 04:46:21 -0500 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Nov 2019 01:46:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,224,1571727600"; d="scan'208";a="210043677" Received: from jsakkine-mobl1.tm.intel.com (HELO localhost) ([10.237.50.162]) by orsmga006.jf.intel.com with ESMTP; 21 Nov 2019 01:46:13 -0800 Date: Thu, 21 Nov 2019 11:46:14 +0200 From: Jarkko Sakkinen To: Sean Christopherson Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" , Peter Zijlstra , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , Tony Luck , Tony W Wang-oc , Shuah Khan , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-edac@vger.kernel.org, linux-kselftest@vger.kernel.org, Borislav Petkov Subject: Re: [PATCH v3 01/19] x86/msr-index: Clean up bit defines for IA32_FEATURE_CONTROL MSR Message-ID: <20191121094614.GA20907@linux.intel.com> References: <20191119031240.7779-1-sean.j.christopherson@intel.com> <20191119031240.7779-2-sean.j.christopherson@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191119031240.7779-2-sean.j.christopherson@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kselftest-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org On Mon, Nov 18, 2019 at 07:12:22PM -0800, Sean Christopherson wrote: > As pointed out by Boris, the defines for bits in IA32_FEATURE_CONTROL > are quite a mouthful, especially the VMX bits which must differentiate > between enabling VMX inside and outside SMX (TXT) operation. Rename the > bit defines to abbreviate FEATURE_CONTROL as FEAT_CTL so that they're a > little friendlier on the eyes. Keep the full name for the MSR itself to > help even the most obtuse reader decipher the abbreviation, and to match > the name used by the Intel SDM. If you anyway shorten the prefix, why not then go directly to FT_CTL? It is as obvious as FEAT_CTL is. Given the exhausting long variable names like FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX this would be worth of considering. /Jarkko