From: Christoph Hellwig <hch@lst.de>
To: Andrew Morton <akpm@linux-foundation.org>,
Arnd Bergmann <arnd@arndb.de>,
Roman Zippel <zippel@linux-m68k.org>
Cc: Jessica Yu <jeyu@kernel.org>, Michal Simek <monstr@monstr.eu>,
x86@kernel.org, linux-alpha@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-c6x-dev@linux-c6x.org, linux-hexagon@vger.kernel.org,
linux-ia64@vger.kernel.org, linux-m68k@lists.linux-m68k.org,
linux-mips@vger.kernel.org, openrisc@lists.librecores.org,
linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
linux-sh@vger.kernel.org, sparclinux@vger.kernel.org,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-um@lists.infradead.org, linux-xtensa@linux-xtensa.org,
linux-fsdevel@vger.kernel.org
Subject: [PATCH 16/29] powerpc: use asm-generic/cacheflush.h
Date: Fri, 15 May 2020 16:36:33 +0200 [thread overview]
Message-ID: <20200515143646.3857579-17-hch@lst.de> (raw)
In-Reply-To: <20200515143646.3857579-1-hch@lst.de>
Power needs almost no cache flushing routines of its own. Rely on
asm-generic/cacheflush.h for the defaults.
Also remove the pointless __KERNEL__ ifdef while we're at it.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/powerpc/include/asm/cacheflush.h | 42 +++++++--------------------
1 file changed, 10 insertions(+), 32 deletions(-)
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index e92191b390f31..e682c8e10e903 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -4,23 +4,9 @@
#ifndef _ASM_POWERPC_CACHEFLUSH_H
#define _ASM_POWERPC_CACHEFLUSH_H
-#ifdef __KERNEL__
-
#include <linux/mm.h>
#include <asm/cputable.h>
-/*
- * No cache flushing is required when address mappings are changed,
- * because the caches on PowerPCs are physically addressed.
- */
-#define flush_cache_all() do { } while (0)
-#define flush_cache_mm(mm) do { } while (0)
-#define flush_cache_dup_mm(mm) do { } while (0)
-#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
-#define flush_icache_page(vma, page) do { } while (0)
-#define flush_cache_vunmap(start, end) do { } while (0)
-
#ifdef CONFIG_PPC_BOOK3S_64
/*
* Book3s has no ptesync after setting a pte, so without this ptesync it's
@@ -33,20 +19,20 @@ static inline void flush_cache_vmap(unsigned long start, unsigned long end)
{
asm volatile("ptesync" ::: "memory");
}
-#else
-static inline void flush_cache_vmap(unsigned long start, unsigned long end) { }
-#endif
+#define flush_cache_vmap flush_cache_vmap
+#endif /* CONFIG_PPC_BOOK3S_64 */
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
extern void flush_dcache_page(struct page *page);
-#define flush_dcache_mmap_lock(mapping) do { } while (0)
-#define flush_dcache_mmap_unlock(mapping) do { } while (0)
void flush_icache_range(unsigned long start, unsigned long stop);
-extern void flush_icache_user_range(struct vm_area_struct *vma,
- struct page *page, unsigned long addr,
- int len);
-extern void flush_dcache_icache_page(struct page *page);
+#define flush_icache_range flush_icache_range
+
+void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+ unsigned long addr, int len);
+#define flush_icache_user_range flush_icache_user_range
+
+void flush_dcache_icache_page(struct page *page);
void __flush_dcache_icache(void *page);
/**
@@ -111,14 +97,6 @@ static inline void invalidate_dcache_range(unsigned long start,
mb(); /* sync */
}
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
- do { \
- memcpy(dst, src, len); \
- flush_icache_user_range(vma, page, vaddr, len); \
- } while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
- memcpy(dst, src, len)
-
-#endif /* __KERNEL__ */
+#include <asm-generic/cacheflush.h>
#endif /* _ASM_POWERPC_CACHEFLUSH_H */
--
2.26.2
next prev parent reply other threads:[~2020-05-15 14:39 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
2020-05-15 14:36 ` [PATCH 01/29] arm: fix the flush_icache_range arguments in set_fiq_handler Christoph Hellwig
2020-05-15 14:36 ` [PATCH 02/29] nds32: unexport flush_icache_page Christoph Hellwig
2020-05-15 14:36 ` [PATCH 03/29] powerpc: unexport flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 04/29] unicore32: remove flush_cache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 05/29] asm-generic: fix the inclusion guards for cacheflush.h Christoph Hellwig
2020-05-15 14:36 ` [PATCH 06/29] asm-generic: don't include <linux/mm.h> in cacheflush.h Christoph Hellwig
2020-05-27 4:34 ` [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h Nathan Chancellor
2020-05-27 5:10 ` Christoph Hellwig
2020-05-27 7:02 ` Geert Uytterhoeven
2020-05-27 8:13 ` Nathan Chancellor
2020-05-27 13:45 ` Laurent Pinchart
2020-05-15 14:36 ` [PATCH 07/29] asm-generic: improve the flush_dcache_page stub Christoph Hellwig
2020-05-15 14:36 ` [PATCH 08/29] alpha: use asm-generic/cacheflush.h Christoph Hellwig
2020-05-15 14:36 ` [PATCH 09/29] arm64: " Christoph Hellwig
2020-05-22 15:54 ` Catalin Marinas
2020-05-15 14:36 ` [PATCH 10/29] c6x: " Christoph Hellwig
2020-05-18 18:20 ` Mark Salter
2020-05-15 14:36 ` [PATCH 11/29] hexagon: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 12/29] ia64: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 13/29] microblaze: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 14/29] m68knommu: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 15/29] openrisc: " Christoph Hellwig
2020-05-15 14:36 ` Christoph Hellwig [this message]
2020-05-15 14:36 ` [PATCH 17/29] riscv: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 18/29] arm,sparc,unicore32: remove flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 19/29] mm: rename flush_icache_user_range to flush_icache_user_page Christoph Hellwig
2020-05-15 14:36 ` [PATCH 20/29] asm-generic: add a flush_icache_user_range stub Christoph Hellwig
2020-05-15 14:36 ` [PATCH 21/29] sh: implement flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 22/29] xtensa: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 23/29] arm: rename flush_cache_user_range to flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 24/29] m68k: implement flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 25/29] exec: only build read_code when needed Christoph Hellwig
2020-05-15 14:36 ` [PATCH 26/29] exec: use flush_icache_user_range in read_code Christoph Hellwig
2020-05-15 14:36 ` [PATCH 27/29] binfmt_flat: use flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 28/29] nommu: use flush_icache_user_range in brk and mmap Christoph Hellwig
2020-05-15 14:36 ` [PATCH 29/29] module: move the set_fs hack for flush_icache_range to m68k Christoph Hellwig
2020-05-18 13:04 ` Jessica Yu
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