Re: [PATCH 05/11] edid-decode: fix standard timing vertical pixels

[Hans Verkuil <hverkuil@xs4all.nl>]

On 14/09/2021 14:11, joevt wrote:
> Don't do ceiling to nearest 8 pixels for active vertical lines. See examples elo-4600l-hdmi and kogan-kaled24144f-hdmi.
> 
> Section 3.9 and 3.10.3.6 of EDID 1.4 does not say vertical lines must be a multiple of 8.  This line of code appears to have been added to satisfy the 3rd example in VTB-EXT spec but that example has an incorrect HAP indicator decimal value so it cannot be trusted. Also, all 3 examples have an incorrect vertical refresh value as noted in parse-vtb-ext-block.cpp. The VESA DMT spec has the following examples that are not a multiple of 8 lines which support this change:
> 1400x1050 4:3
> 1440x900 16:10
> 1600x900 16:9
> 1680x1050 16:10
> 
> Signed-off-by: Joe van Tunen <joevt@shaw.ca>
> ---
>  parse-base-block.cpp | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/parse-base-block.cpp b/parse-base-block.cpp
> index e2901a6..32d2079 100644
> --- a/parse-base-block.cpp
> +++ b/parse-base-block.cpp
> @@ -573,7 +573,6 @@ void edid_state::print_standard_timing(const char *prefix, unsigned char b1, uns
>  		break;
>  	}
>  	vact = (double)hact * vratio / hratio;
> -	vact = 8 * ((vact + 7) / 8);

I need to look closer at this. I think it was added to help with 1360x768, which without
this line maps to 1360x765.

I'll get back to you on this.

Regards,

	Hans

>  	refresh = (b2 & 0x3f) + 60;
>  
>  	formula.hact = hact;
>