From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5FD4C282DD for ; Thu, 18 Apr 2019 01:34:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9D44121850 for ; Thu, 18 Apr 2019 01:34:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732251AbfDRBek (ORCPT ); Wed, 17 Apr 2019 21:34:40 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:5258 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728268AbfDRBek (ORCPT ); Wed, 17 Apr 2019 21:34:40 -0400 X-UUID: 99a3936551dd4d639097015f5e8d0bee-20190418 X-UUID: 99a3936551dd4d639097015f5e8d0bee-20190418 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1957517224; Thu, 18 Apr 2019 09:34:30 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs03n1.mediatek.inc (172.21.101.181) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 18 Apr 2019 09:34:29 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 18 Apr 2019 09:34:29 +0800 Message-ID: <1555551269.2407.9.camel@mtksdaap41> Subject: Re: [PATCH v2 02/15] [media] mtk-mipicsi: add mediatek mipicsi driver for mt2712 From: CK Hu To: Stu Hsieh CC: Mauro Carvalho Chehab , Rob Herring , Mark Rutland , "Matthias Brugger" , , , , , , Date: Thu, 18 Apr 2019 09:34:29 +0800 In-Reply-To: <1555407015-18130-3-git-send-email-stu.hsieh@mediatek.com> References: <1555407015-18130-1-git-send-email-stu.hsieh@mediatek.com> <1555407015-18130-3-git-send-email-stu.hsieh@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Hi, Stu: On Tue, 2019-04-16 at 17:30 +0800, Stu Hsieh wrote: > This patch add mediatek mipicsi driver for mt2712, > including probe function to get the value from device tree, > and register to v4l2 the host device. > > Signed-off-by: Stu Hsieh > --- > drivers/media/platform/mtk-mipicsi/Makefile | 4 + > .../media/platform/mtk-mipicsi/mtk_mipicsi.c | 767 ++++++++++++++++++ > 2 files changed, 771 insertions(+) > create mode 100644 drivers/media/platform/mtk-mipicsi/Makefile > create mode 100644 drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c > > diff --git a/drivers/media/platform/mtk-mipicsi/Makefile b/drivers/media/platform/mtk-mipicsi/Makefile > new file mode 100644 > index 000000000000..326a5e3808fa > --- /dev/null > +++ b/drivers/media/platform/mtk-mipicsi/Makefile > @@ -0,0 +1,4 @@ > +mtk-mipicsi-y += mtk_mipicsi.o > + > +obj-$(CONFIG_VIDEO_MEDIATEK_MIPICSI) += mtk-mipicsi.o > + > diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c b/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c > new file mode 100644 > index 000000000000..e26bebe17fe5 > --- /dev/null > +++ b/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c > @@ -0,0 +1,767 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2017 MediaTek Inc. > + * Author: Ricky Zhang > + * Baoyin Zhang > + * Alan Yue > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * http://www.gnu.org/licenses/gpl-2.0.html for more details. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#ifdef CONFIG_VB2_MEDIATEK_DMA_SG > +#include "mtkbuf-dma-cache-sg.h" > +#endif > + > +#define MTK_MIPICSI_DRV_NAME "mtk-mipicsi" > +#define MTK_PLATFORM_STR "platform:mt2712" > +#define MIPICSI_COMMON_CLK 2 > +#define MTK_CAMDMA_MAX_NUM 4U > +#define MIPICSI_CLK (MIPICSI_COMMON_CLK + MTK_CAMDMA_MAX_NUM) > +#define MTK_DATAWIDTH_8 (0x01U << 7U) > +#define MAX_SUPPORT_WIDTH 4096U > +#define MAX_SUPPORT_HEIGHT 4096U > +#define MAX_BUFFER_NUM 32U > +#define VID_LIMIT_BYTES (100U * 1024U * 1024U) > + > +/* buffer for one video frame */ > +struct mtk_mipicsi_buf { > + struct list_head queue; > + struct vb2_buffer *vb; > + dma_addr_t vb_dma_addr_phy; > + int prepare_flag; > +}; > + > +struct mtk_mipicsi_dev { > + struct soc_camera_host soc_host; > + struct platform_device *pdev; > + unsigned int camsv_num; > + struct v4l2_device v4l2_dev; > + struct device *larb_pdev; > + void __iomem *ana; > + void __iomem *seninf_ctrl; Separating register control to another patch looks strange to me. Register control is the bottom part and this patch is the top part. You send a top part first then the bottom part. 'seninf_ctrl' is useless in this patch, you may move this to the patch that use this variable or merge that patch into this patch. Regards, CK > + void __iomem *seninf; > + struct regmap *seninf_top; > + void __iomem *seninf_mux[MTK_CAMDMA_MAX_NUM]; > + void __iomem *camsv[MTK_CAMDMA_MAX_NUM]; > + const struct soc_camera_format_xlate *current_fmt; > + u16 width_flags; /* max 12 bits */ > + struct list_head capture_list[MTK_CAMDMA_MAX_NUM]; > + struct list_head fb_list; > + spinlock_t lock; > + spinlock_t queue_lock; > + struct mtk_mipicsi_buf cam_buf[MAX_BUFFER_NUM]; > + bool streamon; > + unsigned long frame_cnt[MTK_CAMDMA_MAX_NUM]; > + unsigned int link; > + unsigned long enqueue_cnt; > + unsigned long dequeue_cnt; > + struct v4l2_ctrl_handler ctrl_hdl; > + char drv_name[16]; > + u32 id; > + int clk_num; > + struct clk *clk[MIPICSI_CLK]; > +}; > +