From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF7DDC742A5 for ; Fri, 12 Jul 2019 07:17:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A22692084B for ; Fri, 12 Jul 2019 07:17:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726200AbfGLHRI (ORCPT ); Fri, 12 Jul 2019 03:17:08 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:15028 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726057AbfGLHRH (ORCPT ); Fri, 12 Jul 2019 03:17:07 -0400 X-UUID: 268a7e11777f4c9c8ce4896cc5248063-20190712 X-UUID: 268a7e11777f4c9c8ce4896cc5248063-20190712 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 2031538665; Fri, 12 Jul 2019 15:16:58 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 12 Jul 2019 15:16:54 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 12 Jul 2019 15:16:55 +0800 Message-ID: <1562915814.27825.2.camel@mtksdaap41> Subject: Re: [RFC PATCH V2 1/4] dt-bindings: mt8183: Added FD dt-bindings From: CK Hu To: Jerry-ch Chen CC: , , , , , , , , , , , , , , , , , , , , Date: Fri, 12 Jul 2019 15:16:54 +0800 In-Reply-To: <1562661672-22439-2-git-send-email-Jerry-Ch.chen@mediatek.com> References: <1562661672-22439-1-git-send-email-Jerry-Ch.chen@mediatek.com> <1562661672-22439-2-git-send-email-Jerry-Ch.chen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-SNTS-SMTP: 01D485D90E4193B16D3DAB4E8F27AE66C4A63D8F503F77DC805346543E9061B22000:8 X-MTK: N Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Hi, Jerry: On Tue, 2019-07-09 at 16:41 +0800, Jerry-ch Chen wrote: > From: Jerry-ch Chen > > This patch adds DT binding documentation for the Face Detection (FD) > unit of the Mediatek's mt8183 SoC. > > Signed-off-by: Jerry-ch Chen > --- > .../bindings/media/mediatek,mt8183-fd.txt | 33 ++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-fd.txt > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8183-fd.txt b/Documentation/devicetree/bindings/media/mediatek,mt8183-fd.txt > new file mode 100644 > index 0000000..0837223 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/mediatek,mt8183-fd.txt > @@ -0,0 +1,33 @@ > +* Mediatek Face Detection Unit (FD) > + > +Face Detection (FD) unit is a typical memory-to-memory HW device. > +It provides hardware accelerated face detection function, and it > +is able to detect different poses of faces. FD will writre result > +of detected face into memory as output. > + > +Required properties: > +- compatible: "mediatek,mt8183-fd" > +- mediatek,scp : the node of system control processor (SCP), see > + Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for details. > +- iommus: should point to the 3 entries: M4U_PORT_CAM_FDVT_RP, > + M4U_PORT_CAM_FDVT_WR and M4U_PORT_CAM_FDVT_RB. (Please see > + Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details.) > +- reg: Physical base address and length of the register space. > +- interrupts: interrupt number to the cpu. > +- clocks : must contain the FDVT clock, see > + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. > +- clock-names: must be "fd". > + > +Example: > + fd: fd@1502b000 { > + compatible = "mediatek,mt8183-fd"; > + mediatek,scp = <&scp>; > + iommus = <&iommu M4U_PORT_CAM_FDVT_RP>, > + <&iommu M4U_PORT_CAM_FDVT_WR>, > + <&iommu M4U_PORT_CAM_FDVT_RB>; > + reg = <0 0x1502b000 0 0x1000>; > + interrupts = ; > + clocks = <&imgsys CLK_IMG_FDVT>; > + clock-names = "fd"; This device has no power-domain? Regards, CK > + }; > +