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From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <skomatineni@nvidia.com>, <thierry.reding@gmail.com>,
	<jonathanh@nvidia.com>, <frankc@nvidia.com>, <hverkuil@xs4all.nl>,
	<helen.koike@collabora.com>, <sboyd@kernel.org>
Cc: <linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: [RFC PATCH v3 2/6] clk: tegra: Add Tegra210 CSI TPG clock gate
Date: Fri, 14 Feb 2020 10:23:24 -0800
Message-ID: <1581704608-31219-3-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1581704608-31219-1-git-send-email-skomatineni@nvidia.com>

Tegra210 CSI hardware internally uses PLLD for internal test pattern
generator logic.

PLLD_BASE register in CAR has a bit CSI_CLK_SOURCE to enable PLLD
out to CSI during TPG mode.

This patch adds this CSI TPG clock gate to Tegra210 clock driver
to allow Tegra video driver to ungate CSI TPG clock during TPG mode
and gate during non TPG mode.

Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/clk/tegra/clk-tegra210.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index 762cd186f714..e66498b5fd6f 100644
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -3041,6 +3041,13 @@ static __init void tegra210_periph_clk_init(void __iomem *clk_base,
 					     periph_clk_enb_refcnt);
 	clks[TEGRA210_CLK_DSIB] = clk;
 
+	/* csi_tpg */
+	clk = clk_register_gate(NULL, "csi_tpg", "pll_d_out0",
+				CLK_SET_RATE_PARENT, clk_base + PLLD_BASE,
+				23, 0, &pll_d_lock);
+	clk_register_clkdev(clk, "csi_tpg", NULL);
+	clks[TEGRA210_CLK_CSI_TPG] = clk;
+
 	/* la */
 	clk = tegra_clk_register_periph("la", la_parents,
 			ARRAY_SIZE(la_parents), &tegra210_la, clk_base,
-- 
2.7.4


  parent reply index

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-14 18:23 [RFC PATCH v3 0/6] Add Tegra driver for video capture Sowjanya Komatineni
2020-02-14 18:23 ` [RFC PATCH v3 1/6] dt-bindings: clock: tegra: Add clk id for CSI TPG clock Sowjanya Komatineni
2020-02-14 18:23 ` Sowjanya Komatineni [this message]
2020-02-14 18:23 ` [RFC PATCH v3 3/6] dt-binding: tegra: Add VI and CSI bindings Sowjanya Komatineni
2020-02-18 23:15   ` Rob Herring
2020-02-19  3:28     ` Sowjanya Komatineni
2020-02-20 19:45       ` Rob Herring
2020-02-20 20:39         ` Sowjanya Komatineni
2020-02-14 18:23 ` [RFC PATCH v3 4/6] media: tegra: Add Tegra210 Video input driver Sowjanya Komatineni
2020-02-16 11:03   ` Hans Verkuil
2020-02-16 19:54     ` Sowjanya Komatineni
2020-02-16 20:11       ` Sowjanya Komatineni
2020-02-16 20:22         ` Sowjanya Komatineni
2020-02-17  8:04           ` Hans Verkuil
2020-02-18  0:59             ` Sowjanya Komatineni
2020-02-18  1:04               ` Sowjanya Komatineni
2020-02-18  3:19                 ` Sowjanya Komatineni
2020-02-19 15:08                   ` Hans Verkuil
2020-02-19 16:22                     ` Sowjanya Komatineni
2020-02-20  0:09                       ` Sowjanya Komatineni
2020-02-20  9:29                         ` Hans Verkuil
2020-02-20 16:21                           ` Sowjanya Komatineni
2020-02-20 12:44   ` Hans Verkuil
2020-02-20 13:33     ` Hans Verkuil
2020-02-20 17:29       ` Sowjanya Komatineni
2020-02-20 19:11       ` Sowjanya Komatineni
2020-02-24  4:45         ` Sowjanya Komatineni
2020-02-26  4:49     ` Sowjanya Komatineni
2020-02-26  5:50       ` Sowjanya Komatineni
2020-02-14 18:23 ` [RFC PATCH v3 5/6] MAINTAINERS: Add Tegra Video driver section Sowjanya Komatineni
2020-02-14 18:23 ` [RFC PATCH v3 6/6] arm64: tegra: Add Tegra VI CSI support in device tree Sowjanya Komatineni
2020-02-17 14:26 ` [RFC PATCH v3 0/6] Add Tegra driver for video capture Hans Verkuil

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