From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_NEOMUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 129D0C10F0E for ; Tue, 9 Apr 2019 07:58:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E2ECB20651 for ; Tue, 9 Apr 2019 07:58:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726579AbfDIH6J (ORCPT ); Tue, 9 Apr 2019 03:58:09 -0400 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:40525 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726062AbfDIH6I (ORCPT ); Tue, 9 Apr 2019 03:58:08 -0400 X-Originating-IP: 90.88.30.125 Received: from localhost (aaubervilliers-681-1-89-125.w90-88.abo.wanadoo.fr [90.88.30.125]) (Authenticated sender: maxime.ripard@bootlin.com) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id AB96520010; Tue, 9 Apr 2019 07:58:04 +0000 (UTC) Date: Tue, 9 Apr 2019 09:58:04 +0200 From: Maxime Ripard To: Chen-Yu Tsai Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Yong Deng , Mauro Carvalho Chehab , Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Kocialkowski Subject: Re: [PATCH 4/6] ARM: dts: sun8i: a83t: Add device node for CSI (Camera Sensor Interface) Message-ID: <20190409075804.4zrwjil7ie2gjigu@flea> References: <20190408165744.11672-1-wens@kernel.org> <20190408165744.11672-5-wens@kernel.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="wzlos4osbyc3wigs" Content-Disposition: inline In-Reply-To: <20190408165744.11672-5-wens@kernel.org> User-Agent: NeoMutt/20180716 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org --wzlos4osbyc3wigs Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, On Tue, Apr 09, 2019 at 12:57:42AM +0800, Chen-Yu Tsai wrote: > From: Chen-Yu Tsai > > The A83T SoC has a camera sensor interface (known as CSI in Allwinner > lingo), which is similar to the one found on the A64 and H3. The only > difference seems to be that support of MIPI CSI through a connected > MIPI CSI-2 bridge. > > Add a device node for it, and pinctrl nodes for the commonly used MCLK > and 8-bit parallel interface. The property /omit-if-no-ref/ is added to > the pinctrl nodes to keep the device tree blob size down if they are > unused. > > Signed-off-by: Chen-Yu Tsai > --- > arch/arm/boot/dts/sun8i-a83t.dtsi | 31 +++++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi > index f739b88efb53..0c52f945fd5f 100644 > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi > @@ -682,6 +682,20 @@ > #interrupt-cells = <3>; > #gpio-cells = <3>; > > + /omit-if-no-ref/ > + csi_8bit_parallel_pins: csi-8bit-parallel-pins { > + pins = "PE0", "PE2", "PE3", "PE6", "PE7", > + "PE8", "PE9", "PE10", "PE11", > + "PE12", "PE13"; > + function = "csi"; > + }; > + > + /omit-if-no-ref/ > + csi_mclk_pin: csi-mclk-pin { > + pins = "PE1"; > + function = "csi"; > + }; > + > emac_rgmii_pins: emac-rgmii-pins { > pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", > "PD11", "PD12", "PD13", "PD14", "PD18", > @@ -994,6 +1008,23 @@ > interrupts = ; > }; > > + csi: camera@1cb0000 { > + compatible = "allwinner,sun8i-a83t-csi"; > + reg = <0x01cb0000 0x1000>; > + interrupts = ; > + clocks = <&ccu CLK_BUS_CSI>, > + <&ccu CLK_CSI_SCLK>, > + <&ccu CLK_DRAM_CSI>; > + clock-names = "bus", "mod", "ram"; > + resets = <&ccu RST_BUS_CSI>; > + status = "disabled"; > + > + csi_in: port { > + #address-cells = <1>; > + #size-cells = <0>; If we expect a single enpoint, then we don't need the address-cells and size-cells properties. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --wzlos4osbyc3wigs Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXKxQjAAKCRDj7w1vZxhR xStlAP9Hv1bnK7S5GNnSHC3IvkFA34kjB8T+KxMg0+m0CzS6JAEA8bJn+HiqEJum qQP8IsIegpCOG3DRwzz8qBkkypHU7gc= =tQ33 -----END PGP SIGNATURE----- --wzlos4osbyc3wigs--