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From: Maxime Ripard <maxime@cerno.tech>
To: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
	devel@driverdev.osuosl.org, linux-sunxi@googlegroups.com,
	Yong Deng <yong.deng@magewell.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@siol.net>,
	Jonathan Corbet <corbet@lwn.net>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>,
	Helen Koike <helen.koike@collabora.com>,
	Dafna Hirschfeld <dafna.hirschfeld@collabora.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Sakari Ailus <sakari.ailus@linux.intel.com>,
	Hans Verkuil <hans.verkuil@cisco.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	kevin.lhopital@hotmail.com
Subject: Re: [PATCH v3 07/15] media: sun6i-csi: Add support for MIPI CSI-2 bridge input
Date: Mon, 14 Dec 2020 12:34:24 +0100	[thread overview]
Message-ID: <20201214113424.cx7ox6i5bm7lszhb@gilmour> (raw)
In-Reply-To: <20201211155708.154710-8-paul.kocialkowski@bootlin.com>

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On Fri, Dec 11, 2020 at 04:57:00PM +0100, Paul Kocialkowski wrote:
> The A31 CSI controller supports a MIPI CSI-2 bridge input, which has
> its own dedicated port in the fwnode graph.
> 
> Support for this input is added with this change:
> - two pads are defined for the media entity instead of one
>   and only one needs to be connected at a time;
> - the pads currently match the fwnode graph representation;
> - links are created between our pads and the subdevs for each
>   interface and are no longer immutable so that userspace can select
>   which interface to use in case both are bound to a subdev;
> - fwnode endpoints are parsed and stored for each interface;
> - the active subdev (and fwnode endpoint) is retrieved when validating
>   the media link at stream on time and cleared at stream off;
> - an error is raised if both links are active at the same time;
> - the MIPI interface bit is set if the MIPI CSI-2 bridge endpoint is
>   active.
> 
> In the future, the media entity representation might evolve to:
> - distinguish the internal parallel bridge and data formatter;
> - represent each of the 4 internal channels that can exist between
>   the parallel bridge (for BT656 time-multiplex) and MIPI CSI-2
>   (internal channels can be mapped to virtual channels);
> - connect the controller's output to the ISP instead of its
>   DMA engine.
> 
> Finally note that the MIPI CSI-2 bridges should not be linked in
> the fwnode graph unless they have a sensor subdev attached.
> 
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
> ---
>  .../platform/sunxi/sun6i-csi/sun6i_csi.c      | 123 ++++++++++++++----
>  .../platform/sunxi/sun6i-csi/sun6i_csi.h      |   3 -
>  .../platform/sunxi/sun6i-csi/sun6i_video.c    |  53 ++++----
>  .../platform/sunxi/sun6i-csi/sun6i_video.h    |   7 +-
>  4 files changed, 135 insertions(+), 51 deletions(-)
> 
> diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> index f1150de94e98..481181038e1e 100644
> --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> @@ -52,15 +52,16 @@ bool sun6i_csi_is_format_supported(struct sun6i_csi *csi,
>  				   u32 pixformat, u32 mbus_code)
>  {
>  	struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi);
> +	struct v4l2_fwnode_endpoint *endpoint = sdev->csi.video.source_endpoint;
>  
>  	/*
>  	 * Some video receivers have the ability to be compatible with
>  	 * 8bit and 16bit bus width.
>  	 * Identify the media bus format from device tree.
>  	 */
> -	if ((sdev->csi.v4l2_ep.bus_type == V4L2_MBUS_PARALLEL
> -	     || sdev->csi.v4l2_ep.bus_type == V4L2_MBUS_BT656)
> -	     && sdev->csi.v4l2_ep.bus.parallel.bus_width == 16) {
> +	if ((endpoint->bus_type == V4L2_MBUS_PARALLEL
> +	     || endpoint->bus_type == V4L2_MBUS_BT656)
> +	     && endpoint->bus.parallel.bus_width == 16) {

The operators should be at the end of the previous line, not at the beginning

Maxime

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  reply	other threads:[~2020-12-14 11:36 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-11 15:56 [PATCH v3 00/15] Allwinner MIPI CSI-2 support for A31/V3s/A83T Paul Kocialkowski
2020-12-11 15:56 ` [PATCH v3 01/15] docs: phy: Add a part about PHY mode and submode Paul Kocialkowski
2020-12-11 15:56 ` [PATCH v3 02/15] phy: Distinguish between Rx and Tx for MIPI D-PHY with submodes Paul Kocialkowski
2020-12-11 15:56 ` [PATCH v3 03/15] phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2 Paul Kocialkowski
2020-12-11 15:56 ` [PATCH v3 04/15] media: sun6i-csi: Use common V4L2 format info for storage bpp Paul Kocialkowski
2020-12-11 15:56 ` [PATCH v3 05/15] media: sun6i-csi: Only configure the interface data width for parallel Paul Kocialkowski
2020-12-11 15:56 ` [PATCH v3 06/15] dt-bindings: media: sun6i-a31-csi: Add MIPI CSI-2 input port Paul Kocialkowski
2020-12-14 23:12   ` Rob Herring
2020-12-11 15:57 ` [PATCH v3 07/15] media: sun6i-csi: Add support for MIPI CSI-2 bridge input Paul Kocialkowski
2020-12-14 11:34   ` Maxime Ripard [this message]
2020-12-11 15:57 ` [PATCH v3 08/15] dt-bindings: media: Add A31 MIPI CSI-2 bindings documentation Paul Kocialkowski
2020-12-14 11:35   ` Maxime Ripard
2020-12-14 23:14     ` Rob Herring
2020-12-11 15:57 ` [PATCH v3 09/15] media: sunxi: Add support for the A31 MIPI CSI-2 controller Paul Kocialkowski
2020-12-14 11:39   ` Maxime Ripard
2020-12-31 12:54     ` Paul Kocialkowski
2020-12-11 15:57 ` [PATCH v3 10/15] ARM: dts: sun8i: v3s: Add nodes for MIPI CSI-2 support Paul Kocialkowski
2020-12-11 15:57 ` [PATCH v3 11/15] MAINTAINERS: Add entry for the Allwinner A31 MIPI CSI-2 bridge Paul Kocialkowski
2020-12-11 15:57 ` [PATCH v3 12/15] dt-bindings: media: Add A83T MIPI CSI-2 bindings documentation Paul Kocialkowski
2020-12-11 15:57 ` [PATCH v3 13/15] media: sunxi: Add support for the A83T MIPI CSI-2 controller Paul Kocialkowski
2020-12-14 11:41   ` Maxime Ripard
2020-12-11 15:57 ` [PATCH v3 14/15] ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node Paul Kocialkowski
2020-12-11 15:57 ` [PATCH v3 15/15] MAINTAINERS: Add entry for the Allwinner A83T MIPI CSI-2 bridge Paul Kocialkowski

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