From: Alex Bee <knaerzche@gmail.com>
To: Ezequiel Garcia <ezequiel@collabora.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Lee Jones <lee.jones@linaro.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
devicetree@vger.kernel.org
Cc: Alex Bee <knaerzche@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev
Subject: [PATCH 04/10] media: hantro: add support for Rockchip RK3066
Date: Tue, 25 May 2021 17:22:19 +0200 [thread overview]
Message-ID: <20210525152225.154302-5-knaerzche@gmail.com> (raw)
In-Reply-To: <20210525152225.154302-1-knaerzche@gmail.com>
RK3066's VPU IP block is the predecessor from what RK3288 has.
The hardware differences are:
- supports decoding frame sizes up to 1920x1088 only
- doesn't have the 'G1_REG_SOFT_RESET' register
(requires another .reset callback for hantro_codec_ops,
since writing this register will result in non-working
IP block)
- has one ACLK/HCLK per vdpu/vepu
- ACLKs can be clocked up to 300 MHz only
- no MMU
(no changes required: CMA will be transparently used)
Add a new RK3066 variant which reflect this differences. This variant
can be used for RK3188 as well.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/staging/media/hantro/hantro_drv.c | 1 +
drivers/staging/media/hantro/hantro_hw.h | 1 +
drivers/staging/media/hantro/rk3288_vpu_hw.c | 116 +++++++++++++++++++
3 files changed, 118 insertions(+)
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
index 2f6b01c7a6a0..38ea7b24036e 100644
--- a/drivers/staging/media/hantro/hantro_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -489,6 +489,7 @@ static const struct of_device_id of_hantro_match[] = {
{ .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
{ .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
{ .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
+ { .compatible = "rockchip,rk3066-vpu", .data = &rk3066_vpu_variant, },
#endif
#ifdef CONFIG_VIDEO_HANTRO_IMX8M
{ .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index 3d8b53567f16..de2bc367a15a 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -163,6 +163,7 @@ enum hantro_enc_fmt {
extern const struct hantro_variant rk3399_vpu_variant;
extern const struct hantro_variant rk3328_vpu_variant;
extern const struct hantro_variant rk3288_vpu_variant;
+extern const struct hantro_variant rk3066_vpu_variant;
extern const struct hantro_variant imx8mq_vpu_variant;
extern const struct hantro_variant sama5d4_vdec_variant;
diff --git a/drivers/staging/media/hantro/rk3288_vpu_hw.c b/drivers/staging/media/hantro/rk3288_vpu_hw.c
index fefd45269e52..29805c4bd92f 100644
--- a/drivers/staging/media/hantro/rk3288_vpu_hw.c
+++ b/drivers/staging/media/hantro/rk3288_vpu_hw.c
@@ -10,8 +10,10 @@
#include "hantro.h"
#include "hantro_jpeg.h"
+#include "hantro_g1_regs.h"
#include "hantro_h1_regs.h"
+#define RK3066_ACLK_MAX_FREQ (300 * 1000 * 1000)
#define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000)
/*
@@ -62,6 +64,52 @@ static const struct hantro_fmt rk3288_vpu_postproc_fmts[] = {
},
};
+static const struct hantro_fmt rk3066_vpu_dec_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_NV12,
+ .codec_mode = HANTRO_MODE_NONE,
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_H264_SLICE,
+ .codec_mode = HANTRO_MODE_H264_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1920,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 1088,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_MPEG2_SLICE,
+ .codec_mode = HANTRO_MODE_MPEG2_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1920,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 1088,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_VP8_FRAME,
+ .codec_mode = HANTRO_MODE_VP8_DEC,
+ .max_depth = 2,
+ .frmsize = {
+ .min_width = 48,
+ .max_width = 1920,
+ .step_width = MB_DIM,
+ .min_height = 48,
+ .max_height = 1088,
+ .step_height = MB_DIM,
+ },
+ },
+};
+
static const struct hantro_fmt rk3288_vpu_dec_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_NV12,
@@ -126,6 +174,14 @@ static irqreturn_t rk3288_vepu_irq(int irq, void *dev_id)
return IRQ_HANDLED;
}
+static int rk3066_vpu_hw_init(struct hantro_dev *vpu)
+{
+ /* Bump ACLKs to max. possible freq. to improve performance. */
+ clk_set_rate(vpu->clocks[0].clk, RK3066_ACLK_MAX_FREQ);
+ clk_set_rate(vpu->clocks[0].clk, RK3066_ACLK_MAX_FREQ);
+ return 0;
+}
+
static int rk3288_vpu_hw_init(struct hantro_dev *vpu)
{
/* Bump ACLK to max. possible freq. to improve performance. */
@@ -133,6 +189,14 @@ static int rk3288_vpu_hw_init(struct hantro_dev *vpu)
return 0;
}
+static void rk3066_vpu_dec_reset(struct hantro_ctx *ctx)
+{
+ struct hantro_dev *vpu = ctx->dev;
+
+ vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT);
+ vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG);
+}
+
static void rk3288_vpu_enc_reset(struct hantro_ctx *ctx)
{
struct hantro_dev *vpu = ctx->dev;
@@ -145,6 +209,33 @@ static void rk3288_vpu_enc_reset(struct hantro_ctx *ctx)
/*
* Supported codec ops.
*/
+static const struct hantro_codec_ops rk3066_vpu_codec_ops[] = {
+ [HANTRO_MODE_JPEG_ENC] = {
+ .run = hantro_h1_jpeg_enc_run,
+ .reset = rk3288_vpu_enc_reset,
+ .init = hantro_jpeg_enc_init,
+ .done = hantro_jpeg_enc_done,
+ .exit = hantro_jpeg_enc_exit,
+ },
+ [HANTRO_MODE_H264_DEC] = {
+ .run = hantro_g1_h264_dec_run,
+ .reset = rk3066_vpu_dec_reset,
+ .init = hantro_h264_dec_init,
+ .exit = hantro_h264_dec_exit,
+ },
+ [HANTRO_MODE_MPEG2_DEC] = {
+ .run = hantro_g1_mpeg2_dec_run,
+ .reset = rk3066_vpu_dec_reset,
+ .init = hantro_mpeg2_dec_init,
+ .exit = hantro_mpeg2_dec_exit,
+ },
+ [HANTRO_MODE_VP8_DEC] = {
+ .run = hantro_g1_vp8_dec_run,
+ .reset = rk3066_vpu_dec_reset,
+ .init = hantro_vp8_dec_init,
+ .exit = hantro_vp8_dec_exit,
+ },
+};
static const struct hantro_codec_ops rk3288_vpu_codec_ops[] = {
[HANTRO_MODE_JPEG_ENC] = {
@@ -183,10 +274,35 @@ static const struct hantro_irq rk3288_irqs[] = {
{ "vdpu", hantro_g1_irq },
};
+static const char * const rk3066_clk_names[] = {
+ "aclk_vdpu", "hclk_vdpu",
+ "aclk_vepu", "hclk_vepu"
+};
+
static const char * const rk3288_clk_names[] = {
"aclk", "hclk"
};
+const struct hantro_variant rk3066_vpu_variant = {
+ .enc_offset = 0x0,
+ .enc_fmts = rk3288_vpu_enc_fmts,
+ .num_enc_fmts = ARRAY_SIZE(rk3288_vpu_enc_fmts),
+ .dec_offset = 0x400,
+ .dec_fmts = rk3066_vpu_dec_fmts,
+ .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts),
+ .postproc_fmts = rk3288_vpu_postproc_fmts,
+ .num_postproc_fmts = ARRAY_SIZE(rk3288_vpu_postproc_fmts),
+ .postproc_regs = &hantro_g1_postproc_regs,
+ .codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER |
+ HANTRO_VP8_DECODER | HANTRO_H264_DECODER,
+ .codec_ops = rk3066_vpu_codec_ops,
+ .irqs = rk3288_irqs,
+ .num_irqs = ARRAY_SIZE(rk3288_irqs),
+ .init = rk3066_vpu_hw_init,
+ .clk_names = rk3066_clk_names,
+ .num_clocks = ARRAY_SIZE(rk3066_clk_names)
+};
+
const struct hantro_variant rk3288_vpu_variant = {
.enc_offset = 0x0,
.enc_fmts = rk3288_vpu_enc_fmts,
--
2.27.0
next prev parent reply other threads:[~2021-05-25 15:22 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-25 15:22 [PATCH 00/10] Add support for older Rockchip SoCs to V4L2 hantro and rkvdec drivers Alex Bee
2021-05-25 15:22 ` [PATCH 01/10] ARM: dts: rockchip: add power controller for RK322x Alex Bee
2021-05-25 15:22 ` [PATCH 02/10] ARM: dts: rockchip: add power controller for RK3036 Alex Bee
2021-05-25 15:22 ` [PATCH 03/10] dt-bindings: mfd: syscon: add Rockchip RK3036/RK3228 qos compatibles Alex Bee
2021-05-25 15:26 ` Heiko Stübner
2021-05-25 15:22 ` Alex Bee [this message]
2021-05-25 22:49 ` [PATCH 04/10] media: hantro: add support for Rockchip RK3066 Heiko Stübner
2021-05-26 10:32 ` Ezequiel Garcia
2021-05-26 23:22 ` Alex Bee
2021-05-27 1:38 ` Ezequiel Garcia
2021-05-25 15:22 ` [PATCH 05/10] media: hantro: add support for Rockchip RK3036 Alex Bee
2021-05-26 10:28 ` Ezequiel Garcia
2021-05-26 23:27 ` Alex Bee
2021-05-26 23:58 ` Heiko Stübner
2021-05-27 1:27 ` Ezequiel Garcia
2021-05-27 20:11 ` Alex Bee
2021-05-25 15:22 ` [PATCH 06/10] ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188 Alex Bee
2021-05-25 15:22 ` [PATCH 07/10] ARM: dts: rockchip: add vpu node for RK322x Alex Bee
2021-05-25 23:05 ` Heiko Stübner
2021-05-25 15:22 ` [PATCH 08/10] media: dt-bindings: media: rockchip-vpu: add new compatibles Alex Bee
2021-05-26 12:56 ` Rob Herring
2021-05-25 15:22 ` [PATCH 09/10] ARM: dts: rockchip: add vdec node for RK322x Alex Bee
2021-05-25 15:22 ` [PATCH 10/10] media: dt-bindings: media: rockchip-vdec: add RK3228 compatible Alex Bee
2021-05-26 12:56 ` Rob Herring
2021-05-25 23:01 ` [PATCH 00/10] Add support for older Rockchip SoCs to V4L2 hantro and rkvdec drivers Heiko Stübner
2021-05-26 23:38 ` Alex Bee
2021-05-27 15:44 ` [PATCH v2 00/12] " Alex Bee
2021-05-27 15:44 ` [PATCH v2 01/12] dt-bindings: mfd: syscon: add Rockchip RK3036/RK3228 qos compatibles Alex Bee
2021-06-01 15:46 ` Lee Jones
2021-07-11 11:55 ` Heiko Stübner
2021-07-15 10:09 ` Alex Bee
2021-07-15 11:07 ` Lee Jones
2021-06-04 20:24 ` Rob Herring
2021-05-27 15:44 ` [PATCH v2 02/12] dt-bindings: media: rockchip-vpu: add new compatibles Alex Bee
2021-06-04 20:44 ` Rob Herring
2021-05-27 15:44 ` [PATCH v2 03/12] dt-bindings: media: rockchip-vdec: add RK3228 compatible Alex Bee
2021-06-04 20:45 ` Rob Herring
2021-05-27 15:44 ` [PATCH v2 04/12] media: hantro: reorder variants Alex Bee
2021-06-11 15:26 ` Ezequiel Garcia
2021-05-27 15:44 ` [PATCH v2 05/12] media: hantro: merge Rockchip platform drivers Alex Bee
2021-06-11 15:36 ` Ezequiel Garcia
2021-06-14 17:02 ` Alex Bee
2021-05-27 15:44 ` [PATCH v2 06/12] media: hantro: add support for Rockchip RK3066 Alex Bee
2021-06-11 15:50 ` Ezequiel Garcia
2021-06-14 16:46 ` Alex Bee
2021-05-27 15:44 ` [PATCH v2 07/12] media: hantro: add support for Rockchip RK3036 Alex Bee
2021-06-11 16:02 ` Ezequiel Garcia
2021-05-27 15:44 ` [PATCH v2 08/12] ARM: dts: rockchip: add power controller for RK3036 Alex Bee
2021-06-11 15:58 ` Ezequiel Garcia
2021-06-13 16:22 ` Heiko Stuebner
2021-06-21 11:58 ` Alex Bee
2021-05-27 15:44 ` [PATCH v2 09/12] ARM: dts: rockchip: add power controller for RK322x Alex Bee
2021-05-27 15:44 ` [PATCH v2 10/12] ARM: dts: rockchip: add vpu node for RK3036 Alex Bee
2021-05-27 15:44 ` [PATCH v2 11/12] ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188 Alex Bee
2021-05-27 15:44 ` [PATCH v2 12/12] ARM: dts: rockchip: add vpu and vdec node for RK322x Alex Bee
2021-06-13 16:27 ` (subset) [PATCH v2 00/12] Add support for older Rockchip SoCs to V4L2 hantro and rkvdec drivers Heiko Stuebner
2021-06-14 11:09 ` Hans Verkuil
2021-06-14 11:13 ` Hans Verkuil
2021-06-21 23:04 ` (subset) " Heiko Stuebner
2021-06-14 21:32 ` [PATCH v3 0/6] " Alex Bee
2021-06-14 21:32 ` [PATCH v3 1/6] dt-bindings: media: rockchip-vpu: add new compatibles Alex Bee
2021-06-14 21:32 ` [PATCH v3 2/6] dt-bindings: media: rockchip-vdec: add RK3228 compatible Alex Bee
2021-06-14 21:32 ` [PATCH v3 3/6] media: hantro: reorder variants Alex Bee
2021-06-14 21:32 ` [PATCH v3 4/6] media: hantro: merge Rockchip platform drivers Alex Bee
2021-06-14 21:32 ` [PATCH v3 5/6] media: hantro: add support for Rockchip RK3066 Alex Bee
2021-06-14 21:32 ` [PATCH v3 6/6] media: hantro: add support for Rockchip RK3036 Alex Bee
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210525152225.154302-5-knaerzche@gmail.com \
--to=knaerzche@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=ezequiel@collabora.com \
--cc=gregkh@linuxfoundation.org \
--cc=heiko@sntech.de \
--cc=lee.jones@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=linux-staging@lists.linux.dev \
--cc=mchehab@kernel.org \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).