From: Adam Ford <aford173@gmail.com>
To: linux-media@vger.kernel.org
Cc: tharvey@gateworks.com, frieder.schrempf@kontron.de,
marek.vasut@gmail.com, jagan@amarulasolutions.com,
aford@beaconembedded.com, cstevens@beaconembedded.com,
Adam Ford <aford173@gmail.com>,
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
Philipp Zabel <p.zabel@pengutronix.de>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Heiko Stuebner <heiko@sntech.de>,
Lucas Stach <l.stach@pengutronix.de>,
Joakim Zhang <qiangqing.zhang@nxp.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Peng Fan <peng.fan@nxp.com>, Alice Guo <alice.guo@nxp.com>,
linux-rockchip@lists.infradead.org (open list:HANTRO VPU CODEC
DRIVER),
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-arm-kernel@lists.infradead.org (moderated
list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE),
linux-kernel@vger.kernel.org (open list),
linux-staging@lists.linux.dev (open list:STAGING SUBSYSTEM)
Subject: [RFC 2/5] arm64: dts: imx8mm: Enable VPU-G1 and VPU-G2
Date: Sat, 6 Nov 2021 13:37:58 -0500 [thread overview]
Message-ID: <20211106183802.893285-3-aford173@gmail.com> (raw)
In-Reply-To: <20211106183802.893285-1-aford173@gmail.com>
Enable two hardware Hantro decoders called G1 and G2.
Signed-off-by: Adam Ford <aford173@gmail.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 41 +++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 1f69c14d953f..725c3113831e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1248,6 +1248,47 @@ gpu_2d: gpu@38008000 {
power-domains = <&pgc_gpu>;
};
+ vpu_g1: video-codec@38300000 {
+ compatible = "nxp,imx8mm-vpu";
+ reg = <0x38300000 0x10000>;
+ reg-names = "g1";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "g1";
+ clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>,
+ <&clk IMX8MM_CLK_VPU_DEC_ROOT>;
+ clock-names = "g1", "bus";
+ assigned-clocks = <&clk IMX8MM_CLK_VPU_G1>,
+ <&clk IMX8MM_CLK_VPU_BUS>,
+ <&clk IMX8MM_VPU_PLL_BYPASS>;
+ assigned-clock-parents = <&clk IMX8MM_VPU_PLL_OUT>,
+ <&clk IMX8MM_SYS_PLL1_800M>,
+ <&clk IMX8MM_VPU_PLL>;
+ assigned-clock-rates = <600000000>,
+ <800000000>,
+ <0>;
+ power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>;
+ };
+
+ vpu_g2: video-codec@38310000 {
+ compatible = "nxp,imx8mm-vpu-g2";
+ reg = <0x38310000 0x10000>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "g2";
+ clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>,
+ <&clk IMX8MM_CLK_VPU_DEC_ROOT>;
+ clock-names = "g2", "bus";
+ assigned-clocks = <&clk IMX8MM_CLK_VPU_G2>,
+ <&clk IMX8MM_CLK_VPU_BUS>,
+ <&clk IMX8MM_VPU_PLL_BYPASS>;
+ assigned-clock-parents = <&clk IMX8MM_VPU_PLL_OUT>,
+ <&clk IMX8MM_SYS_PLL1_800M>,
+ <&clk IMX8MM_VPU_PLL>;
+ assigned-clock-rates = <600000000>,
+ <800000000>,
+ <0>;
+ power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>;
+ };
+
vpu_blk_ctrl: blk-ctrl@38330000 {
compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon";
reg = <0x38330000 0x100>;
--
2.32.0
next prev parent reply other threads:[~2021-11-06 18:38 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-06 18:37 [RFC 0/5] arm64: imx8mm: Enable Hantro VPUs Adam Ford
2021-11-06 18:37 ` [RFC 1/5] media: hantro: Add support for i.MX8M Mini Adam Ford
2021-11-20 16:03 ` Adam Ford
2021-11-25 15:35 ` Hans Verkuil
2021-11-06 18:37 ` Adam Ford [this message]
2021-11-06 18:37 ` [RFC 3/5] media: hantro: Rename ROCKCHIP_VPU_ENC_FMT to HANTRO_VPU_ENC_FMT Adam Ford
2021-11-06 18:38 ` [RFC 4/5] media: hantro: Add H1 encoder support on i.MX8M Mini Adam Ford
2021-11-07 23:21 ` Adam Ford
2021-11-06 18:38 ` [RFC 5/5] arm64: dts: imx8mm: Enable Hantro H1 Encoder Adam Ford
2021-11-08 13:59 ` [RFC 0/5] arm64: imx8mm: Enable Hantro VPUs Nicolas Dufresne
2021-11-08 16:33 ` Adam Ford
2021-11-09 15:57 ` Nicolas Dufresne
2021-11-16 23:23 ` Tim Harvey
2021-11-18 14:30 ` Nicolas Dufresne
2021-11-18 16:20 ` Tim Harvey
2021-11-18 18:16 ` Adam Ford
2021-11-19 16:29 ` Nicolas Dufresne
2021-11-19 23:37 ` Adam Ford
2021-11-20 15:36 ` Adam Ford
2021-11-22 17:25 ` Tim Harvey
2021-11-23 20:07 ` Nicolas Dufresne
2021-11-29 16:48 ` Adam Ford
2021-11-29 16:54 ` Ezequiel Garcia
2021-11-29 18:59 ` Adam Ford
2021-11-29 19:35 ` Tim Harvey
2021-11-29 19:42 ` Adam Ford
2021-11-30 14:00 ` Ezequiel Garcia
2021-11-30 19:28 ` Tim Harvey
2021-11-30 20:33 ` Adam Ford
2021-12-17 4:48 ` Ezequiel Garcia
2021-12-17 13:15 ` Adam Ford
2021-12-17 17:13 ` Nicolas Dufresne
2021-12-17 17:26 ` Tim Harvey
2021-12-17 17:52 ` Nicolas Dufresne
2021-12-20 3:13 ` Chen-Yu Tsai
2021-12-03 4:34 ` Nicolas Dufresne
2021-12-03 16:46 ` Tim Harvey
2021-12-03 19:37 ` Nicolas Dufresne
2021-12-06 9:20 ` Lucas Stach
2021-12-06 20:46 ` Nicolas Dufresne
2021-11-23 0:06 ` Tim Harvey
2021-11-23 20:10 ` Nicolas Dufresne
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