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From: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
To: linux-media@vger.kernel.org
Cc: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>,
	Robert Beckett <bob.beckett@collabora.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-staging@lists.linux.dev (open list:STAGING SUBSYSTEM),
	linux-kernel@vger.kernel.org (open list),
	laurent.pinchart@ideasonboard.com, hverkuil@xs4all.nl,
	kernel@collabora.com, dafna3@gmail.com,
	kiril.bicevski@collabora.com,
	Nas Chung <nas.chung@chipsnmedia.com>,
	lafley.kim@chipsnmedia.com, scott.woo@chipsnmedia.com,
	olivier.crete@collabora.com, dan.carpenter@oracle.com,
	rdunlap@infradead.org, daniel@0x0f.com
Subject: [PATCH v4 4/6] staging: media: wave5: Add TODO file
Date: Wed,  1 Dec 2021 19:56:11 +0200	[thread overview]
Message-ID: <20211201175613.13710-5-dafna.hirschfeld@collabora.com> (raw)
In-Reply-To: <20211201175613.13710-1-dafna.hirschfeld@collabora.com>

Add a TODO file listing all that is need for destaging.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
---
 drivers/staging/media/wave5/TODO | 64 ++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)
 create mode 100644 drivers/staging/media/wave5/TODO

diff --git a/drivers/staging/media/wave5/TODO b/drivers/staging/media/wave5/TODO
new file mode 100644
index 000000000000..425ed42a234c
--- /dev/null
+++ b/drivers/staging/media/wave5/TODO
@@ -0,0 +1,64 @@
+* Test on real silicon once available
+
+  This driver has so far been tested on pre-silicon FPGA and on the beta BeagleV
+  board which uses the StarFive JH7100 beta SoC.
+
+  Testing on FPGA shows it working fine, though the FPGA uses polled interrupts
+  and copied buffers between the host and it's on board RAM.
+
+  Testing on BeagleV shows buffer corruption that is currently attributed to a
+  known silicon issue in the SoC that makes the cache coherent interconnect not
+  so coherent.
+  This can likely be solved when the riscv non-coherent dma support lands and
+  provide optional v4l2 non-contiguous allocator, though it remains to be seen
+  whether support non-coherent use cases will be useful in real world hw.
+
+  Until we can test and resolve any issues on final silicon (due 2H 2021)
+  this driver should remain in staging.
+
+* Handle interrupts better
+
+  Currently the interrupt handling uses an unusual design employing a kfifo to
+  transfer irq status to irq thread. This was done as a work around for dropped
+  interrupts seen with IRQF_ONESHOT based handling.
+
+  This needs further investigation and fixing properly, with the aid of
+  C&M and StarFive engineers.
+
+* Fix early end of stream handling
+
+  When using a gstreamer pipeline like this:
+  gst-launch-1.0 filesrc location=<file> ! parsebin ! h264parse ! v4l2h264dec ! jpegenc ! identity eos-after=3 !  multifilesink location=%05d.jpeg
+  i.e. forced eos after 3 buffers
+  the pipeline stalls on exit waiting for end of job.
+  We need to add some form of early exit detection, instead of the current
+  behaviour of only considering a job finish on PIC_END.
+
+* Support more formats
+
+  The current frontend v4l2 layer only supports V4L2_PIX_FMT_HEVC and
+  V4L2_PIX_FMT_H264.
+  The backend logic supports other formats, so we should wire up the support
+  for further bitsream formats.
+
+* appropreate error handling:
+allocation failure, mutex acquire failure etc.
+
+* remove all unused struct fields
+
+* change struct fields to 'bool' type or bitfield when appropreate
+Likely good candidates are fields named '*_enable' , '*_on'
+
+* handle vdi_allocate_dma_memory failure , each function has to clean after itself
+
+* make sure that 'u32', 's32' etc. are only used when reading/writing hw
+and change s32 to u32 when s32 is not required
+
+* power management handling - add (runtime_)suspen/resume cb where the clock is enabled
+
+* fix checkpatch issues (mostly fixes , only left to fix MACRO_ARG_REUSE, LONG_LINE)
+
+* revise logic of wave5_vpu_(dec/enc)_register_framebuffer
+
+* check if the  normal kernel endianness/__swab32 routines are sufficient. (instead of the ones
+  implemented in the driver
-- 
2.17.1


  parent reply	other threads:[~2021-12-01 17:56 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-01 17:56 [PATCH v4 0/6] staging: media: wave5: add wave5 codec driver Dafna Hirschfeld
2021-12-01 17:56 ` [PATCH v4 1/6] staging: media: wave5: Add vpuapi layer Dafna Hirschfeld
2021-12-04 13:43   ` Daniel Palmer
2021-12-14  5:33     ` Dafna Hirschfeld
2021-12-14  7:48       ` Dafna Hirschfeld
2021-12-14 10:20         ` Daniel Palmer
2022-01-21  9:22           ` Dafna Hirschfeld
2022-01-21  9:33             ` Daniel Palmer
     [not found]               ` <b06402c9-e27e-f6e0-abd5-688106a36ba6@collabora.com>
     [not found]                 ` <CAFr9PXnn5EnApGk7vYcFEF0+J6kojhNTMspNnM8asN512fkTew@mail.gmail.com>
2022-01-27 19:49                   ` Dafna Hirschfeld
2022-01-30  7:53                     ` Daniel Palmer
2021-12-01 17:56 ` [PATCH v4 2/6] staging: media: wave5: Add the vdi layer Dafna Hirschfeld
2021-12-01 17:56 ` [PATCH v4 3/6] staging: media: wave5: Add the v4l2 layer Dafna Hirschfeld
2021-12-01 17:56 ` Dafna Hirschfeld [this message]
2021-12-01 17:56 ` [PATCH v4 5/6] dt-bindings: media: staging: wave5: add yaml devicetree bindings Dafna Hirschfeld
2021-12-01 17:56 ` [PATCH v4 6/6] media: wave5: Add wave5 driver to maintainers file Dafna Hirschfeld
2021-12-02 10:11 ` [PATCH v4 0/6] staging: media: wave5: add wave5 codec driver Daniel Palmer
2021-12-13 20:27   ` Dafna Hirschfeld

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