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From: Lucas Stach <l.stach@pengutronix.de>
To: Ezequiel Garcia <ezequiel@collabora.com>,
	Benjamin Gaignard <benjamin.gaignard@collabora.com>,
	p.zabel@pengutronix.de, mchehab@kernel.org, robh+dt@kernel.org,
	shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com,
	lee.jones@linaro.org, gregkh@linuxfoundation.org,
	mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org,
	jernej.skrabec@siol.net, hverkuil-cisco@xs4all.nl,
	emil.l.velikov@gmail.com, "Peng Fan (OSS)" <peng.fan@oss.nxp.com>,
	Jacky Bai <ping.bai@nxp.com>
Cc: devel@driverdev.osuosl.org, devicetree@vger.kernel.org,
	linux-media@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-rockchip@lists.infradead.org, linux-imx@nxp.com,
	kernel@pengutronix.de, kernel@collabora.com, cphealy@gmail.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v9 03/13] media: hantro: Use syscon instead of 'ctrl' register
Date: Mon, 17 May 2021 15:46:20 +0200	[thread overview]
Message-ID: <7c09d1ffbe79c3d6138258d0827613a1cc6544c4.camel@pengutronix.de> (raw)
In-Reply-To: <5aa5700b862234895a7a6eb251ca3c80fdc1a6d3.camel@collabora.com>

Am Montag, dem 17.05.2021 um 10:23 -0300 schrieb Ezequiel Garcia:
> On Mon, 2021-05-17 at 12:52 +0200, Lucas Stach wrote:
> > Hi Ezequiel,
> > 
> > Am Sonntag, dem 16.05.2021 um 19:40 -0300 schrieb Ezequiel Garcia:
> > > Hi Lucas,
> > > 
> > > On Fri, 2021-04-16 at 12:54 +0200, Lucas Stach wrote:
> > > > Am Mittwoch, dem 07.04.2021 um 09:35 +0200 schrieb Benjamin Gaignard:
> > > > > In order to be able to share the control hardware block between
> > > > > VPUs use a syscon instead a ioremap it in the driver.
> > > > > To keep the compatibility with older DT if 'nxp,imx8mq-vpu-ctrl'
> > > > > phandle is not found look at 'ctrl' reg-name.
> > > > > With the method it becomes useless to provide a list of register
> > > > > names so remove it.
> > > > 
> > > > Sorry for putting a spoke in the wheel after many iterations of the
> > > > series.
> > > > 
> > > > We just discussed a way forward on how to handle the clocks and resets
> > > > provided by the blkctl block on i.MX8MM and later and it seems there is
> > > > a consensus on trying to provide virtual power domains from a blkctl
> > > > driver, controlling clocks and resets for the devices in the power
> > > > domain. I would like to avoid introducing yet another way of handling
> > > > the blkctl and thus would like to align the i.MX8MQ VPU blkctl with
> > > > what we are planning to do on the later chip generations.
> > > > 
> > > > CC'ing Jacky Bai and Peng Fan from NXP, as they were going to give this
> > > > virtual power domain thing a shot.
> > > > 
> > > 
> > > It seems the i.MX8MM BLK-CTL series are moving forward:
> > > 
> > > https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=479175
> > > 
> > > ... but I'm unable to wrap my head around how this affects the
> > > devicetree VPU modelling for i.MX8MQ (and also i.MX8MM, i.MX8MP, ...).
> > > 
> > > 
> > For the i.MX8MQ we want to have the same virtual power-domains provided
> > by a BLK-CTRL driver for the VPUs, as on i.MX8MM. This way we should be
> > able to use the same DT bindings for the VPUs on i.MX8MQ and i.MX8MM,
> > even though the SoC integration with the blk-ctrl is a little
> > different.
> > 
> 
> AFAICS, there's not support for i.MX8MP VPU power domains. I suppose
> we should make sure we'll be able to cover those as well.
> 
> Will i.MX8MP need its own driver as well?
> > 

I haven't looked too closely at the 8MP VPU subsystem yet, but I expect
it to be slightly different again so it will need changes to the blk-
ctrl driver. But that's the whole point of this virtual power domain
exercise: abstract away the SoC specific things in the blk-ctrl driver,
so the VPU driver doesn't need to care about them.

Regards,
Lucas


  reply	other threads:[~2021-05-17 13:46 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-07  7:35 [PATCH v9 00/13] Add HANTRO G2/HEVC decoder support for IMX8MQ Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 01/13] dt-bindings: mfd: Add 'nxp,imx8mq-vpu-ctrl' to syscon list Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 02/13] dt-bindings: media: nxp,imx8mq-vpu: Update the bindings for G2 support Benjamin Gaignard
2021-11-29 20:13   ` [PATCH v9 02/13] dt-bindings: media: nxp, imx8mq-vpu: " Adam Ford
2021-11-30 12:34     ` Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 03/13] media: hantro: Use syscon instead of 'ctrl' register Benjamin Gaignard
2021-04-16 10:54   ` Lucas Stach
2021-04-16 13:08     ` Benjamin Gaignard
2021-04-16 15:14       ` Lucas Stach
2021-04-20  9:10         ` Benjamin Gaignard
2021-04-20  9:16           ` Hans Verkuil
2021-04-20  9:31             ` Benjamin Gaignard
2021-04-20 11:35               ` Hans Verkuil
2021-05-16 22:40     ` Ezequiel Garcia
2021-05-17 10:52       ` Lucas Stach
2021-05-17 13:23         ` Ezequiel Garcia
2021-05-17 13:46           ` Lucas Stach [this message]
2021-06-04 17:37         ` Ezequiel Garcia
2021-06-28 13:35     ` Benjamin Gaignard
2021-06-28 15:18       ` Ezequiel Garcia
2021-04-07  7:35 ` [PATCH v9 04/13] media: hevc: Add fields and flags for hevc PPS Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 05/13] media: hevc: Add decode params control Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 06/13] media: hantro: change hantro_codec_ops run prototype to return errors Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 07/13] media: hantro: Define HEVC codec profiles and supported features Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 08/13] media: hantro: Only use postproc when post processed formats are defined Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 09/13] media: uapi: Add a control for HANTRO driver Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 10/13] media: hantro: handle V4L2_PIX_FMT_HEVC_SLICE control Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 11/13] media: hantro: Introduce G2/HEVC decoder Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 12/13] media: hantro: IMX8M: add variant for G2/HEVC codec Benjamin Gaignard
2021-04-07  7:35 ` [PATCH v9 13/13] arm64: dts: imx8mq: Add node to G2 hardware Benjamin Gaignard

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