From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A7A1B16C6B7; Fri, 5 Apr 2024 12:06:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712318812; cv=none; b=gIuGYq0jfEZlTlIOp8ZavyP2Z9seLhuW1cVPTNQX+SprPegOQ/iHuoj1qQnJr9Z8LOtAW0tJVb6TwTkUtc7Tc9oIw+BqERTE7f4hRV44OYwWAa0CuUDq9flp+3L7vZcgVujH6+TiV9EptNoXaz9Mv5ViEORXhYMY/EijOgXxRFI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712318812; c=relaxed/simple; bh=8udbtc3zbmiq/sV8nsHuH04X2jwirz+XbUgbxkncsxU=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Qcckco0F3Ydx7jLSvROBNmq6jiay4u+mSyJmxnqUDURiAqd6cxDjIfQmTfOzktJU0mCTKSox1kj7qSRoXGk3HkTgkaF5GuTlfvm93ElGcBhxS0OnkE64K4/7ht4oJE1x/Ky7sxmUtZtQidgQapY+/Nw8POF4YDgmzIcpHp4sFHI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=OzJOKNFi; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="OzJOKNFi" Received: from [192.168.88.20] (91-154-34-181.elisa-laajakaista.fi [91.154.34.181]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id D7D1F8E1; Fri, 5 Apr 2024 14:06:08 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1712318769; bh=8udbtc3zbmiq/sV8nsHuH04X2jwirz+XbUgbxkncsxU=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=OzJOKNFiXmMCqPsGl4NC1Hk/6/jFuH1paLdQ5qhv1urzKyWMsgPVlRNdPNMiAThtE B3W/952ZOqopPtOFloFBqq5poU+mb//eAnVV6ig+VZiEF/3kInpe7DMDJSjPrRghZp C8U5wP6hN65HwWYooVa9FqtZdgkiptQxNur1PYKY= Message-ID: <8891d988-9646-45a0-8bd5-68814a3f08d3@ideasonboard.com> Date: Fri, 5 Apr 2024 15:06:44 +0300 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/9] drm: xlnx: zynqmp_dpsub: Set layer mode during creation To: Anatoliy Klymenko Cc: dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org, Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Michal Simek , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab References: <20240321-dp-live-fmt-v3-0-d5090d796b7e@amd.com> <20240321-dp-live-fmt-v3-1-d5090d796b7e@amd.com> From: Tomi Valkeinen Content-Language: en-US Autocrypt: addr=tomi.valkeinen@ideasonboard.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 21/03/2024 22:43, Anatoliy Klymenko wrote: > Set layer mode of operation (live or dma-based) during layer creation. > > Each DPSUB layer mode of operation is defined by corresponding DT node port > connection, so it is possible to assign it during layer object creation. > Previously it was set in layer enable functions, although it is too late > as setting layer format depends on layer mode, and should be done before > given layer enabled. > > Signed-off-by: Anatoliy Klymenko > Reviewed-by: Laurent Pinchart > --- > drivers/gpu/drm/xlnx/zynqmp_disp.c | 20 ++++++++++++++++---- > drivers/gpu/drm/xlnx/zynqmp_disp.h | 13 +------------ > drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- > drivers/gpu/drm/xlnx/zynqmp_kms.c | 2 +- > 4 files changed, 19 insertions(+), 18 deletions(-) Reviewed-by: Tomi Valkeinen Tomi > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c b/drivers/gpu/drm/xlnx/zynqmp_disp.c > index 8a39b3accce5..e6d26ef60e89 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.c > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c > @@ -64,6 +64,16 @@ > > #define ZYNQMP_DISP_MAX_NUM_SUB_PLANES 3 > > +/** > + * enum zynqmp_dpsub_layer_mode - Layer mode > + * @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode > + * @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode > + */ > +enum zynqmp_dpsub_layer_mode { > + ZYNQMP_DPSUB_LAYER_NONLIVE, > + ZYNQMP_DPSUB_LAYER_LIVE, > +}; > + > /** > * struct zynqmp_disp_format - Display subsystem format information > * @drm_fmt: DRM format (4CC) > @@ -902,15 +912,12 @@ u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer, > /** > * zynqmp_disp_layer_enable - Enable a layer > * @layer: The layer > - * @mode: Operating mode of layer > * > * Enable the @layer in the audio/video buffer manager and the blender. DMA > * channels are started separately by zynqmp_disp_layer_update(). > */ > -void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer, > - enum zynqmp_dpsub_layer_mode mode) > +void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer) > { > - layer->mode = mode; > zynqmp_disp_avbuf_enable_video(layer->disp, layer); > zynqmp_disp_blend_layer_enable(layer->disp, layer); > } > @@ -1134,6 +1141,11 @@ static int zynqmp_disp_create_layers(struct zynqmp_disp *disp) > layer->id = i; > layer->disp = disp; > layer->info = &layer_info[i]; > + /* For now assume dpsub works in either live or non-live mode for both layers. > + * Hybrid mode is not supported yet. > + */ > + layer->mode = disp->dpsub->dma_enabled ? ZYNQMP_DPSUB_LAYER_NONLIVE > + : ZYNQMP_DPSUB_LAYER_LIVE; > > ret = zynqmp_disp_layer_request_dma(disp, layer); > if (ret) > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.h b/drivers/gpu/drm/xlnx/zynqmp_disp.h > index 123cffac08be..9b8b202224d9 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.h > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.h > @@ -42,16 +42,6 @@ enum zynqmp_dpsub_layer_id { > ZYNQMP_DPSUB_LAYER_GFX, > }; > > -/** > - * enum zynqmp_dpsub_layer_mode - Layer mode > - * @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode > - * @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode > - */ > -enum zynqmp_dpsub_layer_mode { > - ZYNQMP_DPSUB_LAYER_NONLIVE, > - ZYNQMP_DPSUB_LAYER_LIVE, > -}; > - > void zynqmp_disp_enable(struct zynqmp_disp *disp); > void zynqmp_disp_disable(struct zynqmp_disp *disp); > int zynqmp_disp_setup_clock(struct zynqmp_disp *disp, > @@ -62,8 +52,7 @@ void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp *disp, > > u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer, > unsigned int *num_formats); > -void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer, > - enum zynqmp_dpsub_layer_mode mode); > +void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer); > void zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer); > void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer, > const struct drm_format_info *info); > diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c > index 1846c4971fd8..04b6bcac3b07 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c > +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c > @@ -1295,7 +1295,7 @@ static void zynqmp_dp_disp_enable(struct zynqmp_dp *dp, > /* TODO: Make the format configurable. */ > info = drm_format_info(DRM_FORMAT_YUV422); > zynqmp_disp_layer_set_format(layer, info); > - zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_LIVE); > + zynqmp_disp_layer_enable(layer); > > if (layer_id == ZYNQMP_DPSUB_LAYER_GFX) > zynqmp_disp_blend_set_global_alpha(dp->dpsub->disp, true, 255); > diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c b/drivers/gpu/drm/xlnx/zynqmp_kms.c > index db3bb4afbfc4..43bf416b33d5 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c > +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c > @@ -122,7 +122,7 @@ static void zynqmp_dpsub_plane_atomic_update(struct drm_plane *plane, > > /* Enable or re-enable the plane if the format has changed. */ > if (format_changed) > - zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_NONLIVE); > + zynqmp_disp_layer_enable(layer); > } > > static const struct drm_plane_helper_funcs zynqmp_dpsub_plane_helper_funcs = { >